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mb/google/rex/var/karis: Use ACPI for touchscreen power sequencing

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This commit transitions the touchscreen power sequencing for the Karis
variant from static coreboot GPIO configuration to ACPI-driven
management. This allows the kernel's touch driver to handle the power
sequencing, providing more flexible and dynamic control.

Redundant touchscreen GPIO configurations in bootblock and romstage are
removed from early_gpio_table, and romstage_gpio_table. These GPIOs are
no longer required to be explicitly set in coreboot given the shift to
ACPI power sequencing.

The generic.use_gpio_for_status register is set to true in the
device's override tree to enable ACPI power sequencing for touchscreen
signaling.

When the generic.use_gpio_for_status flag is enabled, the touchscreen
driver's power resource method will perform a probe to determine the
device's operational status. This probe specifically verifies two
critical conditions:

- The Enable GPIO pin is enabled (HIGH).
- The Reset GPIO pin is not in reset (LOW).

If both of these conditions are met, the touchscreen is considered ready
and functional.

Conversely, if either of these conditions is not met, the _ON method
within the power resource will be invoked. The _ON method is then
responsible for executing the full touchscreen initialization sequence
to bring the device into an operational state.

BUG=b:430444353
TEST=Able to build and boot google/karis. Verified touchscreen is
working as expected with this patch.

Change-Id: I967650290dda9ca3ca66a2f161fff0ae84b14f04
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88516
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2025-07-22 04:31:31 +00:00
commit 26e6d0be00
2 changed files with 1 additions and 9 deletions
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9
src/mainboard/google/rex/variants/karis/gpio.c
View file

@ -399,11 +399,6 @@ static const struct pad_config early_gpio_table[] = {
/* GPP_H10 : [] ==> SOC_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_H10, NONE, LOCK_CONFIG),
/* GPP_C00 : [] ==> EN_TCHSCR_PWR */
PAD_CFG_GPO(GPP_C00, 1, DEEP),
/* GPP_C01 : [] ==> SOC_TCHSCR_RST_R_L */
PAD_CFG_GPO(GPP_C01, 0, DEEP),
/* GPP_A19 : [] ==> EN_PP3300_SSD */
PAD_CFG_GPO(GPP_A19, 1, DEEP),
};
@ -413,10 +408,6 @@ static const struct pad_config romstage_gpio_table[] = {
PAD_CFG_GPO(GPP_B11, 0, DEEP),
/* GPP_C23 : [] ==> FP_RST_ODL */
PAD_CFG_GPO(GPP_C23, 0, DEEP),
/* GPP_C00 : [] ==> EN_TCHSCR_PWR */
PAD_CFG_GPO(GPP_C00, 1, DEEP),
/* GPP_C01 : [] ==> SOC_TCHSCR_RST_R_L */
PAD_CFG_GPO(GPP_C01, 0, DEEP),
/* GPP_D02 : Not Connected */
PAD_NC(GPP_D02, NONE),
/* GPP_A20 : [] ==> SSD_PERST_L */

1
src/mainboard/google/rex/variants/karis/overridetree.cb
View file

@ -404,6 +404,7 @@ chip soc/intel/meteorlake
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C06)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.use_gpio_for_status" = "true"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x10 on end
end