soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
ITSS has PCI Interrupt Route (PIR) registers to map PCI INTA-D to one of PIRQA-H. This patch adds a function itss_get_dev_pirq() returning PIRQ for a given device and INT pin. Change-Id: If911b34c506a4a3657b873baab33814c1a7d674b Signed-off-by: Yuchi Chen <yuchi.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shuo Liu <shuo.liu@intel.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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@ -23,6 +23,9 @@
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#define PCR_ITSS_PIRQG_ROUT 0x3106
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/* PIRQH Routing Control Register */
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#define PCR_ITSS_PIRQH_ROUT 0x3107
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/* ITSS Interrupt Route */
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#define PCR_ITSS_PIR 0x3140
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#define PCI_ITSS_PIR(i) (PCR_ITSS_PIR + (i) * 2)
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/* ITSS Interrupt polarity control */
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#define PCR_ITSS_IPC0_CONF 0x3200
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/* ITSS Power reduction control */
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@ -30,6 +33,7 @@
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#if !defined(__ACPI__)
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#include <device/device.h>
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#include <southbridge/intel/common/acpi_pirq_gen.h>
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#include <stdint.h>
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@ -43,6 +47,12 @@ void itss_restore_irq_polarities(int start, int end);
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void itss_irq_init(const uint8_t pch_interrupt_routing[PIRQ_COUNT]);
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void itss_clock_gate_8254(void);
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/* SoC implementation to return corresponding PIR register offset. */
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uint32_t itss_soc_get_on_chip_dev_pir(struct device *dev);
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/* Return which PIRQx the device's INTx is connected to. */
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enum pirq itss_get_on_chip_dev_pirq(struct device *dev, enum pci_pin pin);
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#endif /* !defined(__ACPI__) */
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#endif /* SOC_INTEL_COMMON_BLOCK_ITSS_H */
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@ -134,3 +134,19 @@ void itss_restore_irq_polarities(int start, int end)
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show_irq_polarities("After");
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}
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enum pirq itss_get_on_chip_dev_pirq(struct device *dev, enum pci_pin pin)
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{
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/* Check if device is on chip. */
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if (dev->upstream->dev->path.type != DEVICE_PATH_DOMAIN)
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return PIRQ_INVALID;
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uint16_t pir = pcr_read16(PID_ITSS, itss_soc_get_on_chip_dev_pir(dev));
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if (pir < PCI_ITSS_PIR(0))
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return PIRQ_INVALID;
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/* The lower 3 bits of every 4 bits indicates which PIRQ is connect to INT. */
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unsigned int pir_shift = (pin - PCI_INT_A) * 4;
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unsigned int pir_mask = 0x07;
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return ((pir >> pir_shift) & pir_mask) + PIRQ_A;
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}
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