dts needed to build.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@372 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2007-06-27 19:19:41 +00:00
commit 26920842e3
2 changed files with 49 additions and 0 deletions

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/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software = "0"; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation = "0"; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY = "0"; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program = "0"; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
{
constructor = "cs5536_constructors";
/* interrupt enables for LPC bus = "0"; each bit is an irq 0-15 */
lpc_serirq_enable = "0";
/* LPC IRQ polarity = "0"; each bit is an irq 0-15 */
lpc_serirq_polarity = "0";
/* 0:Continuous 1:Quiet */
lpc_serirq_mode = "0";
/* GPIO(0-0x20) for INT D:C:B:A, 0xFF=none. See virtual pci spec... */
enable_gpio_int_route = "0";
/* 0:IDE 1:FLASH, if you are using nand flash instead of IDE drive */
enable_ide_nand_flash = "0";
/* Enable USB Port 4 0:host 1:device */
enable_USBP4_device = "0";
/* 0:off, xxxx:overcurrent setting, e.g. 0x3FEA CS5536 - Data Book (pages 380-381) */
enable_USBP4_overcurrent = "0";
com1_enable = "0";
com1_address = "0x3f8";
com1_irq = "4";
com2_enable = "0";
com2_address ="0x2f8";
com2_irq = "3";
};

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{
ide0_enable = "0";
ide1_enable = "0";
constructor = "i82371eb_constructors";
};