soc/intel/lunarlake: Support stepping A0_2
Details: - Add support for new Lunar Lake MCH ID 0x6410 - Add new CPU id 0xb06d1 Reference: Lunar Lake External Design Specification Volume 1 (734362) TEST=Build, boot the system and verfiy MCH-ID prints in bootblock stage. Below prints verified on Lunar Lake RVP board (lnlrvp). [DEBUG] MCH: device id 6410 (rev 02) is LunarLake M Change-Id: I976d7f269485633d835d204afa224736d71baaa8 Signed-off-by: Saurabh Mishra <mishra.saurabh@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81847 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
parent
7f2020b712
commit
254a4b9072
4 changed files with 4 additions and 0 deletions
|
|
@ -81,5 +81,6 @@
|
|||
#define CPUID_RAPTORLAKE_J0 0xb06a2
|
||||
#define CPUID_RAPTORLAKE_Q0 0xb06a3
|
||||
#define CPUID_LUNARLAKE_A0_1 0xb06d0
|
||||
#define CPUID_LUNARLAKE_A0_2 0xb06d1
|
||||
|
||||
#endif /* CPU_INTEL_CPU_IDS_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue