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cpu/x86/lapic: Do not inline some utility functions

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They are not __always_inline and specially enable_lapic()
will become more complex to support X2APIC state changes.

Change-Id: Ic180fa8b36e419aba07e1754d4bf48c9dfddb2f3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55258
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2021-06-06 16:58:19 +03:00
commit 242f1d962f
3 changed files with 45 additions and 36 deletions
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37
src/include/cpu/x86/lapic.h
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@ -116,25 +116,6 @@ static __always_inline void lapic_wait_icr_idle(void)
do { } while (lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY);
}
static inline void enable_lapic(void)
{
msr_t msr;
msr = rdmsr(LAPIC_BASE_MSR);
msr.hi &= 0xffffff00;
msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK;
msr.lo |= LAPIC_DEFAULT_BASE;
msr.lo |= LAPIC_BASE_MSR_ENABLE;
wrmsr(LAPIC_BASE_MSR, msr);
}
static inline void disable_lapic(void)
{
msr_t msr;
msr = rdmsr(LAPIC_BASE_MSR);
msr.lo &= ~LAPIC_BASE_MSR_ENABLE;
wrmsr(LAPIC_BASE_MSR, msr);
}
static __always_inline unsigned int initial_lapicid(void)
{
uint32_t lapicid;
@ -168,20 +149,8 @@ static __always_inline void stop_this_cpu(void)
void stop_this_cpu(void);
#endif
void lapic_virtual_wire_mode_init(void);
/* See if I need to initialize the local APIC */
static inline int need_lapic_init(void)
{
return CONFIG(SMP) || CONFIG(IOAPIC);
}
static inline void setup_lapic(void)
{
if (need_lapic_init())
lapic_virtual_wire_mode_init();
else
disable_lapic();
}
void enable_lapic(void);
void disable_lapic(void);
void setup_lapic(void);
#endif /* CPU_X86_LAPIC_H */