From 230e4ed9948efba25d91a96f9af2ed58bcab3500 Mon Sep 17 00:00:00 2001 From: Shawn Nematbakhsh Date: Tue, 13 Aug 2013 10:50:15 -0700 Subject: [PATCH] peppy: Set optimal DTLE register values. Empirical testing shows that 0x5 is the optimal setting for DTLE DATA / EDGE on Peppy. BUG=chrome-os-partner:21712. TEST=Manual. Set DTLE configuration on Peppy, read back registers to verify. BRANCH=FalcoPeppy. Change-Id: I273a3a68be97b3eb7c2ee2071e5de1ef7bf7f2d9 Signed-off-by: Shawn Nematbakhsh Reviewed-on: https://gerrit.chromium.org/gerrit/65717 Reviewed-by: Marc Jones --- src/mainboard/google/peppy/devicetree.cb | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/mainboard/google/peppy/devicetree.cb b/src/mainboard/google/peppy/devicetree.cb index 06ca93c9f4..b19f04bf88 100644 --- a/src/mainboard/google/peppy/devicetree.cb +++ b/src/mainboard/google/peppy/devicetree.cb @@ -70,6 +70,10 @@ chip northbridge/intel/haswell register "sata_ahci" = "0x1" register "sata_port_map" = "0x1" + # DTLE DATA / EDGE values + register "sata_port0_gen3_dtle" = "0x5" + register "sata_port1_gen3_dtle" = "0x5" + register "sio_acpi_mode" = "0" register "sio_i2c0_voltage" = "0" # 3.3V register "sio_i2c1_voltage" = "0" # 3.3V