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arm: Fix memory barrier usage in IO operation

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The dmb should be executed before reading operations, and before/after writing
operations.

BUG=none
TEST=manual: emerge-daisy chromeos-firmware-snow; booted Snow.
BRANCH=none

Change-Id: I3405cd8bef35b5454c423790d1886c87509c0f28
Reviewed-on: https://gerrit.chromium.org/gerrit/58441
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Hung-Te Lin 2013-06-12 15:01:56 -07:00 • committed by ChromeBot
commit 230c7e0a2c
1 changed files with 6 additions and 6 deletions
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12
src/arch/armv7/include/arch/io.h
View file

@ -29,41 +29,41 @@
static inline uint8_t read8(const void *addr)
{
uint8_t v = *(volatile uint8_t *)addr;
dmb();
return v;
return *(volatile uint8_t *)addr;
}
static inline uint16_t read16(const void *addr)
{
uint16_t v = *(volatile uint16_t *)addr;
dmb();
return v;
return *(volatile uint16_t *)addr;
}
static inline uint32_t read32(const void *addr)
{
uint32_t v = *(volatile uint32_t *)addr;
dmb();
return v;
return *(volatile uint32_t *)addr;
}
static inline void write8(uint8_t val, const void *addr)
{
dmb();
*(volatile uint8_t *)addr = val;
dmb();
}
static inline void write16(uint16_t val, const void *addr)
{
dmb();
*(volatile uint16_t *)addr = val;
dmb();
}
static inline void write32(uint32_t val, const void *addr)
{
dmb();
*(volatile uint32_t *)addr = val;
dmb();
}
/*