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soc/qualcomm/x1p42100: Split dram_aop region to map dram_aop_cmd_db as

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non-cacheable

Add support to split the dram_aop memory region into three in order to
map dram_aop_cmd_db as non-cacheable. The purpose of dram_aop_config
is memory region where the aop_devcfg.mbn image is loaded.

Test=1. Build and boot on X1P42100.
2. Dump the MMU table in coreboot ramstage and verify whether the region
is mapped as non-cacheable.

Change-Id: Id73d878b7d343f248a845bd5727c43e22c4c348a
Signed-off-by: Swathi Tamilselvan <tswathi@qualcomm.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90521
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Swathi Tamilselvan 2025-12-16 10:30:03 +05:30 • committed by Matt DeVillier
commit 2277edff88
2 changed files with 9 additions and 1 deletions
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8
src/soc/qualcomm/x1p42100/memlayout.ld
View file

@ -73,6 +73,10 @@
* 0x81CE0000 +----------------------------------------------------------+ | |
* | dram_tme_crashdump | | |
* 0x81CA0000 +----------------------------------------------------------+ | |
* | dram_aop_config | | |
* 0x81C80000 +----------------------------------------------------------+ | |
* | dram_aop_cmd_db | | |
* 0x81C60000 +----------------------------------------------------------+ | |
* | dram_aop | | |
* 0x81C00000 +----------------------------------------------------------+ | |
* | dram_ramdump | | |
@ -240,7 +244,9 @@ SECTIONS
REGION(dram_xbl_log, 0x81A00000, 0x40000, 4K)
REGION(dram_ramdump, 0x81A40000, 0x1C0000, 4K)
REGION(dram_aop, 0x81C00000, 0xA0000, 4K)
REGION(dram_aop, 0x81C00000, 0x60000, 4K)
REGION(dram_aop_cmd_db, 0x81C60000, 0x20000, 4K)
REGION(dram_aop_config, 0x81C80000, 0x20000, 4K)
REGION(dram_tme_crashdump, 0x81CA0000, 0x40000, 4K)
REGION(dram_tme_log, 0x81CE0000, 0x4000, 4K)
REGION(dram_dc_log, 0x81CE4000, 0x10000, 4K)

2
src/soc/qualcomm/x1p42100/soc.c
View file

@ -30,6 +30,7 @@ static void soc_read_resources(struct device *dev)
for (int i = 0; i < count; i++)
ram_range(dev, index++, (uintptr_t)config[i].offset, config[i].size);
mmio_range(dev, index++, (uintptr_t)_dram_aop_cmd_db, REGION_SIZE(dram_aop_cmd_db));
reserved_ram_range(dev, index++, (uintptr_t)_dram_ncc, REGION_SIZE(dram_ncc));
reserved_ram_range(dev, index++, (uintptr_t)_dram_cpucp, REGION_SIZE(dram_cpucp));
reserved_ram_range(dev, index++, (uintptr_t)_dram_xbl_log, REGION_SIZE(dram_xbl_log));
@ -39,6 +40,7 @@ static void soc_read_resources(struct device *dev)
reserved_ram_range(dev, index++, (uintptr_t)_dram_tz, REGION_SIZE(dram_tz));
reserved_ram_range(dev, index++, (uintptr_t)_dram_aop, REGION_SIZE(dram_aop));
reserved_ram_range(dev, index++, (uintptr_t)_dram_aop_config, REGION_SIZE(dram_aop_config));
reserved_ram_range(dev, index++, (uintptr_t)_dram_tme_crashdump, REGION_SIZE(dram_tme_crashdump));
reserved_ram_range(dev, index++, (uintptr_t)_dram_tme_log, REGION_SIZE(dram_tme_log));
reserved_ram_range(dev, index++, (uintptr_t)_dram_dc_log, REGION_SIZE(dram_dc_log));