diff --git a/src/mainboard/google/fatcat/variants/kinmen/gpio.c b/src/mainboard/google/fatcat/variants/kinmen/gpio.c index ede819d698..6b67795410 100644 --- a/src/mainboard/google/fatcat/variants/kinmen/gpio.c +++ b/src/mainboard/google/fatcat/variants/kinmen/gpio.c @@ -36,6 +36,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPO(GPP_A11, 1, PLTRST), /* GPP_A12: WIFI_WAKE_N */ PAD_CFG_GPI_SCI_LOW(GPP_A12, NONE, DEEP, LEVEL), + /* GPP_A13: MEM_STRAP_0 */ + PAD_CFG_GPI(GPP_A13, NONE, DEEP), /* GPP_A15: GPP_A15_DNX_FORCE_RELOAD */ PAD_CFG_NF(GPP_A15, NONE, DEEP, NF1), /* GPP_A16: BT_RF_KILL_N */ @@ -95,8 +97,10 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_B22, NONE, DEEP, NF4), /* GPP_B23: ISH_GP_6_SNSR_HDR */ PAD_CFG_NF(GPP_B23, NONE, DEEP, NF4), - /* GPP_B24: ESPI_ALERT0_EC_R_N */ - PAD_NC(GPP_B24, NONE), + /* GPP_B24: MEM_STRAP_3 */ + PAD_CFG_GPI(GPP_B24, NONE, DEEP), + /* GPP_B25: MEM_STRAP_2 */ + PAD_CFG_GPI(GPP_B25, NONE, DEEP), /* GPP_C00: GPP_C0_SMBCLK */ PAD_CFG_NF(GPP_C00, NONE, DEEP, NF1), @@ -110,8 +114,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_C04, NONE, DEEP, NF1), /* GPP_C06: SML1_CLK */ PAD_CFG_NF(GPP_C06, NONE, DEEP, NF1), - /* GPP_C07: SML1_DATA */ - PAD_CFG_NF(GPP_C07, NONE, DEEP, NF1), + /* GPP_C07: MEM_CH_SEL */ + PAD_CFG_GPI(GPP_C07, NONE, DEEP), /* GPP_C09: CLKREQ0_X8_GEN5_DT_CEM_SLOT_N */ PAD_CFG_NF(GPP_C09, NONE, DEEP, NF1), /* GPP_C10: CLKREQ1_X4_GEN5_M2_SSD_N */ @@ -183,8 +187,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1), /* GPP_D23: BPKI3C_SCL */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1), - /* GPP_D24: PEG_SLOT_WAKE_N */ - PAD_CFG_GPI_SCI_LOW(GPP_D24, NONE, DEEP, LEVEL), + /* GPP_D24: MEM_STRAP_1 */ + PAD_CFG_GPI(GPP_D24, NONE, DEEP), /* GPP_D25: X4_SLOT_WAKE_N */ PAD_CFG_GPI_SCI_LOW(GPP_D25, NONE, DEEP, LEVEL), diff --git a/src/mainboard/google/fatcat/variants/kinmen/memory.c b/src/mainboard/google/fatcat/variants/kinmen/memory.c index e0908adabd..4637347562 100644 --- a/src/mainboard/google/fatcat/variants/kinmen/memory.c +++ b/src/mainboard/google/fatcat/variants/kinmen/memory.c @@ -33,8 +33,8 @@ static const struct mb_cfg lp5_mem_config = { .dq1 = { 10, 9, 11, 8, 13, 14, 12, 15 }, }, .ddr6 = { - .dq0 = { 9, 10, 11, 8, 14, 12, 13, 15, }, - .dq1 = { 0, 1, 2, 3, 5, 7, 4, 6 }, + .dq0 = { 9, 8, 11, 10, 14, 12, 13, 15, }, + .dq1 = { 6, 4, 5, 7, 1, 3, 0, 2 }, }, .ddr7 = { .dq0 = { 0, 1, 2, 3, 7, 5, 6, 4, }, @@ -69,8 +69,27 @@ const struct mb_cfg *variant_memory_params(void) return &lp5_mem_config; } -void variant_get_spd_info(struct mem_spd *spd_info) +int variant_memory_sku(void) { - spd_info->topo = MEM_TOPO_MEMORY_DOWN; - spd_info->cbfs_index = 0; + /* + * Memory configuration board straps + * GPIO_MEM_CONFIG_0 GPP_A13 + * GPIO_MEM_CONFIG_1 GPP_D24 + * GPIO_MEM_CONFIG_2 GPP_B25 + * GPIO_MEM_CONFIG_3 GPP_B24 + */ + gpio_t spd_gpios[] = { + GPP_A13, + GPP_D24, + GPP_B25, + GPP_B24, + }; + + return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); +} + +bool variant_is_half_populated(void) +{ + /* GPIO_MEM_CH_SEL GPP_C07 */ + return gpio_get(GPP_C07); }