diff --git a/src/soc/intel/common/block/aspm/aspm.c b/src/soc/intel/common/block/aspm/aspm.c
index 595de84d0d..56da3cb91e 100644
--- a/src/soc/intel/common/block/aspm/aspm.c
+++ b/src/soc/intel/common/block/aspm/aspm.c
@@ -74,15 +74,6 @@ static unsigned int l1ss_control_to_upd(enum L1_substates_control l1_substates_c
 	return UPD_INDEX(l1_substates_control);
 }
 
-static unsigned int pcie_speed_control_to_upd(enum PCIE_SPEED_control pcie_speed_control)
-{
-	/* Use auto unless overwritten */
-	if (!pcie_speed_control)
-		return UPD_INDEX(SPEED_AUTO);
-
-	return UPD_INDEX(pcie_speed_control);
-}
-
 void configure_pch_rp_power_management(FSP_S_CONFIG *s_cfg,
 					      const struct pcie_rp_config *rp_cfg,
 					      unsigned int index)
diff --git a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
index 6ff07cf3b2..68137490b9 100644
--- a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
+++ b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
@@ -149,6 +149,19 @@ void pcie_rp_update_devicetree(const struct pcie_rp_group *groups);
  */
 uint32_t pcie_rp_enable_mask(const struct pcie_rp_group *groups);
 
+/*
+ * Convert PCIe speed control setting to UPD index format.
+ *
+ * Takes a PCIE_SPEED_control enum value and converts it to the corresponding
+ * UPD (Unit Parameter Data) index required by the firmware interface.
+ *
+ * If pcie_speed_control is 0 (uninitialized/default), the function returns
+ * the UPD index for SPEED_AUTO, enabling automatic speed negotiation.
+ * Otherwise, it returns the UPD index corresponding to the specified speed
+ * control value.
+ */
+unsigned int pcie_speed_control_to_upd(enum PCIE_SPEED_control pcie_speed_control);
+
 /* Get PCH root port groups */
 const struct pcie_rp_group *soc_get_pch_rp_groups(void);
 
diff --git a/src/soc/intel/common/block/pcie/pcie_helpers.c b/src/soc/intel/common/block/pcie/pcie_helpers.c
index 00bef42a79..697d1c7520 100644
--- a/src/soc/intel/common/block/pcie/pcie_helpers.c
+++ b/src/soc/intel/common/block/pcie/pcie_helpers.c
@@ -39,3 +39,12 @@ uint32_t pcie_rp_enable_mask(const struct pcie_rp_group *const groups)
 
 	return mask;
 }
+
+unsigned int pcie_speed_control_to_upd(enum PCIE_SPEED_control pcie_speed_control)
+{
+	/* Use auto unless overwritten */
+	if (!pcie_speed_control)
+		return UPD_INDEX(SPEED_AUTO);
+
+	return UPD_INDEX(pcie_speed_control);
+}