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UPSTREAM: soc/intel/common: Save Memory DIMM Information in SMBIOS table

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Save SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.
Add function dimm_info_fill() which populates SMBIOS memory
information from FSP MEM_INFO_DATA_HOB data.

BUG=chrome-os-partner:61729
BRANCH=none
TEST=Build and boot KBLRVP to verify the type 17 DIMM info coming in
SMBIOS table from Kernel command "dmidecode".

Change-Id: I489ff93622c18183115b9d7a0cb62a22a96bdc3e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e13b77564f
Original-Change-Id: I0fd7c9887076d3fdd320fcbdcc873cb1965b950c
Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18418
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/449821
This commit is contained in:
Barnali Sarkar 2017-02-21 16:24:49 +05:30 • committed by chrome-bot
commit 1f23e55aff
3 changed files with 81 additions and 0 deletions
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1
src/soc/intel/common/Makefile.inc
View file

@ -13,6 +13,7 @@ romstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c
romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
romstage-y += util.c
romstage-$(CONFIG_MMA) += mma.c
romstage-y += smbios.c
postcar-y += util.c
postcar-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c

53
src/soc/intel/common/smbios.c Normal file
View file

@ -0,0 +1,53 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Intel Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <smbios.h>
#include "smbios.h"
#include <string.h>
#include <console/console.h>
/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
u32 frequency, u8 channel_id, u8 dimm_id, const char *module_part_num,
u16 data_width)
{
dimm->dimm_size = dimm_capacity;
dimm->ddr_type = ddr_type;
dimm->ddr_frequency = frequency;
dimm->channel_num = channel_id;
dimm->dimm_num = dimm_id;
strncpy((char *)dimm->module_part_number,
module_part_num,
sizeof(dimm->module_part_number));
switch (data_width) {
case 8:
dimm->bus_width = MEMORY_BUS_WIDTH_8;
break;
case 16:
dimm->bus_width = MEMORY_BUS_WIDTH_16;
break;
case 32:
dimm->bus_width = MEMORY_BUS_WIDTH_32;
break;
case 64:
dimm->bus_width = MEMORY_BUS_WIDTH_64;
break;
case 128:
dimm->bus_width = MEMORY_BUS_WIDTH_128;
break;
default:
printk(BIOS_ERR, "Incorrect DIMM Data width");
}
}

27
src/soc/intel/common/smbios.h Normal file
View file

@ -0,0 +1,27 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Intel Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _COMMON_SMBIOS_H_
#define _COMMON_SMBIOS_H_
#include <stdint.h>
#include <memory_info.h>
/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
u32 frequency, u8 channel_id, u8 dimm_id, const char *module_part_num,
u16 data_width);
#endif /* _COMMON_SMBIOS_H_ */