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mb/google/skywalker: Set up all output GPIOs

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Set up all output GPIOs. The initial values are set consistently with
the values in kernel to avoid voltage steps in the bootup process. The
GPIOs are sorted by their EINT IDs.

BUG=none
TEST=emerge-skywalker coreboot
BRANCH=skywalker

Change-Id: Iacc1808108a33ca66f06ba5b3a4b082ed4e2673f
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89286
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Yu-Ping Wu 2025-09-22 12:34:59 +08:00 • committed by Yidi Lin
commit 1e7908fa9f
1 changed files with 20 additions and 6 deletions
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28
src/mainboard/google/skywalker/chromeos.c
View file

@ -25,15 +25,29 @@ void setup_chromeos_gpios(void)
gpio_input(GPIO_SD_CD_ODL);
gpio_input(GPIO_HDMI_HPD_1V8_ODL);
gpio_output(GPIO_AP_EC_WARM_RST_REQ, 0);
gpio_output(GPIO_AP_XHCI_INIT_DONE, 0);
gpio_output(GPIO_AP_SUSPEND_L, 1);
gpio_output(GPIO_AP_HDMI_RST_ODL, 0);
gpio_output(GPIO_AP_FP_FW_UP_STRAP, 0);
gpio_output(GPIO_EN_PWR_FP, 0);
gpio_output(GPIO_FP_RST_1V8_S3_L, 0);
gpio_output(GPIO_EN_SPKR, 0);
gpio_output(GPIO_RST_SPKR_L, 0);
gpio_output(GPIO_USB3_HUB_RST_L, 0);
gpio_output(GPIO_WWAN_RESET_L, 0);
gpio_output(GPIO_EN_PWR_FP, 0);
gpio_output(GPIO_EDP_BL_EN_1V8, 0);
gpio_output(GPIO_TCHSCR_REPORT_DISABLE, 1);
gpio_output(GPIO_CODEC_PWR_SOC_EN, 0);
gpio_output(GPIO_EN_PP3300_EDP_X, 0);
gpio_output(GPIO_EN_PP3300_WWAN_X, 0);
gpio_output(GPIO_WWAN_SAR_DETECT_L, 1);
gpio_output(GPIO_TCHSCR_RST_1V8_L, 0);
gpio_output(GPIO_AP_HDMI_RST_ODL, 0);
gpio_output(GPIO_AP_XHCI_INIT_DONE, 0);
gpio_output(GPIO_AP_FP_FW_UP_STRAP, 0);
gpio_output(GPIO_FP_RST_1V8_S3_L, 0);
gpio_output(GPIO_EN_HDMI_PWR, 0);
gpio_output(GPIO_AP_EC_WARM_RST_REQ, 0);
gpio_output(GPIO_AP_SUSPEND_L, 1);
gpio_output(GPIO_BT_KILL_1V8_L, 0);
gpio_output(GPIO_WIFI_KILL_1V8_L, 0);
gpio_output(GPIO_WWAN_PWR_OFF_L, 0);
gpio_output(GPIO_WWAN_W_DISABLE_L, 0);
}
void fill_lb_gpios(struct lb_gpios *gpios)