diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc
index 9ceb9faf1a..2de4f711c9 100644
--- a/src/soc/nvidia/tegra124/Makefile.inc
+++ b/src/soc/nvidia/tegra124/Makefile.inc
@@ -4,10 +4,10 @@ bootblock-y += bootblock.c
 bootblock-y += bootblock_asm.S
 bootblock-y += cbfs.c
 bootblock-y += clock.c
-bootblock-y += cpug.S
 bootblock-y += dma.c
 bootblock-y += i2c.c
 bootblock-y += dma.c
+bootblock-y += maincpu.S
 bootblock-y += monotonic_timer.c
 bootblock-y += power.c
 bootblock-y += spi.c
@@ -37,11 +37,11 @@ endif
 
 ramstage-y += cbfs.c
 ramstage-y += cbmem.c
-ramstage-y += cpug.S
 ramstage-y += clock.c
 ramstage-y += display.c displayhack.c
 ramstage-y += dma.c
 ramstage-y += i2c.c
+ramstage-y += maincpu.S
 ramstage-y += monotonic_timer.c
 ramstage-y += soc.c
 ramstage-y += sor.c
diff --git a/src/soc/nvidia/tegra124/clock.c b/src/soc/nvidia/tegra124/clock.c
index ce81ae8263..1da5426ee4 100644
--- a/src/soc/nvidia/tegra124/clock.c
+++ b/src/soc/nvidia/tegra124/clock.c
@@ -20,8 +20,8 @@
 #include <soc/clock.h>
 #include <stdlib.h>
 #include "clk_rst.h"
-#include "cpug.h"
 #include "flow.h"
+#include "maincpu.h"
 #include "pmc.h"
 #include "sysctr.h"
 
@@ -309,9 +309,9 @@ void clock_cpu0_config_and_reset(void *entry)
 {
 	void * const evp_cpu_reset = (uint8_t *)TEGRA_EVP_BASE + 0x100;
 
-	write32(CONFIG_STACK_TOP, &cpug_stack_pointer);
-	write32((uintptr_t)entry, &cpug_entry_point);
-	write32((uintptr_t)&cpug_setup, evp_cpu_reset);
+	write32(CONFIG_STACK_TOP, &maincpu_stack_pointer);
+	write32((uintptr_t)entry, &maincpu_entry_point);
+	write32((uintptr_t)&maincpu_setup, evp_cpu_reset);
 
 	/* Set active CPU cluster to G */
 	clrbits_le32(&flow->cluster_control, 1);
diff --git a/src/soc/nvidia/tegra124/cpug.S b/src/soc/nvidia/tegra124/maincpu.S
similarity index 88%
rename from src/soc/nvidia/tegra124/cpug.S
rename to src/soc/nvidia/tegra124/maincpu.S
index 7f761e8de4..7b217d8b61 100644
--- a/src/soc/nvidia/tegra124/cpug.S
+++ b/src/soc/nvidia/tegra124/maincpu.S
@@ -27,20 +27,20 @@
  * SUCH DAMAGE.
  */
 
-	.align 6
+	.align 2
 	.arm
 
-	.global cpug_stack_pointer
-cpug_stack_pointer:
+	.global maincpu_stack_pointer
+maincpu_stack_pointer:
 	.word 0
 
-	.global cpug_entry_point
-cpug_entry_point:
+	.global maincpu_entry_point
+maincpu_entry_point:
 	.word 0
 
-	.global cpug_setup
-	.type cpug_setup, function
-	cpug_setup:
+	.global maincpu_setup
+	.type maincpu_setup, function
+	maincpu_setup:
 
 	/*
 	 * Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data
@@ -50,7 +50,7 @@ cpug_entry_point:
 	 */
 	msr	cpsr_cxf, #0xdf
 
-	ldr	sp, cpug_stack_pointer
+	ldr	sp, maincpu_stack_pointer
 	eor	lr, lr
-	ldr	r0, cpug_entry_point
+	ldr	r0, maincpu_entry_point
 	bx	r0
diff --git a/src/soc/nvidia/tegra124/cpug.h b/src/soc/nvidia/tegra124/maincpu.h
similarity index 77%
rename from src/soc/nvidia/tegra124/cpug.h
rename to src/soc/nvidia/tegra124/maincpu.h
index 842843a65b..1d5a907a80 100644
--- a/src/soc/nvidia/tegra124/cpug.h
+++ b/src/soc/nvidia/tegra124/maincpu.h
@@ -17,13 +17,13 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __SOC_NVIDIA_TEGRA124_CPUG_H__
-#define __SOC_NVIDIA_TEGRA124_CPUG_H__
+#ifndef __SOC_NVIDIA_TEGRA124_MAINCPU_H__
+#define __SOC_NVIDIA_TEGRA124_MAINCPU_H__
 
 #include <stdint.h>
 
-extern u32 cpug_stack_pointer;
-extern u32 cpug_entry_point;
-void cpug_setup(void);
+extern u32 maincpu_stack_pointer;
+extern u32 maincpu_entry_point;
+void maincpu_setup(void);
 
-#endif	/* __SOC_NVIDIA_TEGRA124_CPUG_H__ */
+#endif	/* __SOC_NVIDIA_TEGRA124_MAINCPU_H__ */