From 1cfe413f954bfe34c7b7b399e0a2a950cd1a377c Mon Sep 17 00:00:00 2001 From: Erik van den Bogaert Date: Thu, 27 Nov 2025 11:26:15 +0100 Subject: [PATCH] soc/intel/common/block/lpc: Support RM590E eSPI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit RM590E eSPI should be correctly configured by LPC driver TEST=Debug log shows initialization messages (eg IOAPIC)at PCI: 00:00:1f.0 Change-Id: I1ee9861c5d8a5e6eeb3ebe6041a9f141d051995a Signed-off-by: Erik van den Bogaert Reviewed-on: https://review.coreboot.org/c/coreboot/+/90247 Reviewed-by: Jérémy Compostella Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer --- src/soc/intel/common/block/lpc/lpc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 118adea1f0..391a0182f2 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -483,6 +483,7 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_TGP_H_ESPI_HM570, PCI_DID_INTEL_TGP_H_ESPI_QM580, PCI_DID_INTEL_TGP_H_ESPI_WM590, + PCI_DID_INTEL_TGP_H_ESPI_RM590E, PCI_DID_INTEL_MCC_ESPI_0, PCI_DID_INTEL_MCC_ESPI_1, PCI_DID_INTEL_MCC_BASE_ESPI,