From 1cf557049c49e1ba11ade1eee7a45fc2b075ff3d Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Tue, 15 Jul 2014 13:41:18 -0700 Subject: [PATCH] samus: Delay bringing SSD out of reset In order to ensure that we meet timing requirements for the SSD power sequencing delay bringing the SSD out of reset until after memory training. BUG=chrome-os-partner:29914 BRANCH=None TEST=build and boot on samus Change-Id: I807e3d3698255287c3fe7219f44e8ec9a0985df1 Signed-off-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/208155 Reviewed-by: Aaron Durbin --- src/mainboard/google/samus/gpio.h | 3 ++- src/mainboard/google/samus/romstage.c | 3 +++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/samus/gpio.h b/src/mainboard/google/samus/gpio.h index f4ba85bef5..9c86119da9 100644 --- a/src/mainboard/google/samus/gpio.h +++ b/src/mainboard/google/samus/gpio.h @@ -23,6 +23,7 @@ #include #define SAMUS_GPIO_PP3300_AUTOBAHN_EN 23 +#define SAMUS_GPIO_SSD_RESET_L 47 static const struct gpio_config mainboard_gpio_config[] = { PCH_GPIO_UNUSED, /* 0: UNUSED */ @@ -72,7 +73,7 @@ static const struct gpio_config mainboard_gpio_config[] = { PCH_GPIO_UNUSED, /* 44: UNUSED */ PCH_GPIO_PIRQ, /* 45: DSP_INT (PIRQN) */ PCH_GPIO_PIRQ, /* 46: HOTWORD_DET_L (PIRQO) */ - PCH_GPIO_OUT_HIGH, /* 47: SSD_RESET_L */ + PCH_GPIO_OUT_LOW, /* 47: SSD_RESET_L */ PCH_GPIO_UNUSED, /* 48: UNUSED */ PCH_GPIO_UNUSED, /* 49: UNUSED */ PCH_GPIO_UNUSED, /* 50: UNUSED */ diff --git a/src/mainboard/google/samus/romstage.c b/src/mainboard/google/samus/romstage.c index 2e1a71f5c5..5c6e40d23e 100644 --- a/src/mainboard/google/samus/romstage.c +++ b/src/mainboard/google/samus/romstage.c @@ -67,6 +67,9 @@ void mainboard_romstage_entry(struct romstage_params *rp) /* Initliaze memory */ romstage_common(rp); + /* Bring SSD out of reset */ + set_gpio(SAMUS_GPIO_SSD_RESET_L, GPIO_OUT_HIGH); + /* * Enable PP3300_AUTOBAHN_EN after initial GPIO setup * to prevent possible brownout.