From 1c6bbac66d3321a9a10ebbf2d1e6a0069ee00d60 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Wed, 29 Jan 2025 12:24:51 +0000 Subject: [PATCH] mb/starlabs/*: Correct/set UserBd in romstage Change-Id: Id0c21cc30a0cfc1dccc3f9863e8f3d522afdf31a Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/86206 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c | 1 + src/mainboard/starlabs/starbook/variants/adl/romstage.c | 1 + src/mainboard/starlabs/starbook/variants/adl_n/romstage.c | 1 + src/mainboard/starlabs/starbook/variants/mtl/romstage.c | 1 + src/mainboard/starlabs/starbook/variants/rpl/romstage.c | 1 + src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c | 2 +- 6 files changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c b/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c index 502411bec6..530246aeea 100644 --- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c +++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c @@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { const struct mb_cfg mem_config = { .type = MEM_TYPE_DDR4, + .UserBd = BOARD_TYPE_ULT_ULX, }; const bool half_populated = true; diff --git a/src/mainboard/starlabs/starbook/variants/adl/romstage.c b/src/mainboard/starlabs/starbook/variants/adl/romstage.c index 17629b460d..d31c63e9d0 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/adl/romstage.c @@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { const struct mb_cfg mem_config = { .type = MEM_TYPE_DDR4, + .UserBd = BOARD_TYPE_MOBILE, }; const bool half_populated = false; diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c b/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c index 2130010262..2f1d1a2b87 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c @@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { const struct mb_cfg mem_config = { .type = MEM_TYPE_DDR4, + .UserBd = BOARD_TYPE_ULT_ULX, }; const bool half_populated = true; diff --git a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c index beb623ca25..64b78846d0 100644 --- a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c @@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { const struct mb_cfg mem_config = { .type = MEM_TYPE_DDR5, + .UserBd = BOARD_TYPE_MOBILE, }; const bool half_populated = false; diff --git a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c index e7e1c6a3d2..a4261e7799 100644 --- a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c @@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { const struct mb_cfg mem_config = { .type = MEM_TYPE_DDR4, + .UserBd = BOARD_TYPE_MOBILE, }; const bool half_populated = false; diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c index b346241c87..235a8b4565 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c @@ -81,7 +81,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }, .ect = true, - .UserBd = BOARD_TYPE_MOBILE, + .UserBd = BOARD_TYPE_ULT_ULX, .LpDdrDqDqsReTraining = true, .lp5x_config = {