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timer: generic udelay()

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Add GENERIC_UDELAY Kconfig option so that a generic
udelay() implementation is provided utilizing the
monotonic timer. That way each board/chipset doesn't
need to duplicate the same udelay(). Additionally,
assume that GENERIC_UDELAY implies init_timer()
is not required.

BUG=None
BRANCH=None
TEST=Built nyan, ryu, and rambi. May need help testing.

Change-Id: Idd26de19eefc91ee3b0ceddfb1bc2152e19fd8ab
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219719
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Aaron Durbin 2014-09-25 10:05:15 -05:00 • committed by chrome-internal-fetch
commit 1a85fbcad7
19 changed files with 24 additions and 243 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/soc/nvidia/tegra124/Kconfig
View file

@ -4,6 +4,8 @@ config SOC_NVIDIA_TEGRA124
select HAVE_UART_MEMORY_MAPPED
select HAVE_UART_SPECIAL
select HAVE_HARD_RESET
select HAVE_MONOTONIC_TIMER
select GENERIC_UDELAY
select BOOTBLOCK_CONSOLE
select EARLY_CONSOLE
select DYNAMIC_CBMEM

4
src/soc/nvidia/tegra124/Makefile.inc
View file

@ -17,7 +17,6 @@ bootblock-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c
bootblock-y += ../tegra/pingroup.c
bootblock-y += ../tegra/pinmux.c
bootblock-y += ../tegra/apbmisc.c
bootblock-y += timer.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
endif
@ -27,7 +26,6 @@ verstage-y += cbfs.c
verstage-y += dma.c
verstage-y += monotonic_timer.c
verstage-y += spi.c
verstage-y += timer.c
verstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
verstage-y += ../tegra/gpio.c
verstage-y += ../tegra/i2c.c
@ -50,7 +48,6 @@ romstage-y += ../tegra/gpio.c
romstage-y += ../tegra/i2c.c
romstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c
romstage-y += ../tegra/pinmux.c
romstage-y += timer.c
romstage-y += cache.c
ifeq ($(CONFIG_EARLY_CONSOLE),y)
romstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
@ -74,7 +71,6 @@ ramstage-y += ../tegra/i2c.c
ramstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c
ramstage-y += ../tegra/pinmux.c
ramstage-y += ../tegra/usb.c
ramstage-y += timer.c
ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
rmodules_$(ARCH-ROMSTAGE-y)-y += monotonic_timer.c

53
src/soc/nvidia/tegra124/timer.c
View file

@ -1,53 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2013 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <timer.h>
#include <delay.h>
#include <thread.h>
void init_timer(void)
{
}
/* delay x useconds */
void udelay(unsigned usec)
{
struct mono_time current, end;
if (!thread_yield_microseconds(usec))
return;
timer_monotonic_get(&current);
end = current;
mono_time_add_usecs(&end, usec);
if (mono_time_after(&current, &end)) {
printk(BIOS_EMERG, "udelay: 0x%08x is impossibly large\n",
usec);
/* There's not much we can do if usec is too big. Use a long,
* paranoid delay value and hope for the best... */
end = current;
mono_time_add_usecs(&end, USECS_PER_SEC);
}
while (mono_time_before(&current, &end))
timer_monotonic_get(&current);
}

1
src/soc/nvidia/tegra132/Kconfig
View file

@ -7,6 +7,7 @@ config SOC_NVIDIA_TEGRA132
select BOOTBLOCK_CONSOLE
select GIC
select HAVE_MONOTONIC_TIMER
select GENERIC_UDELAY
select HAVE_HARD_RESET
select HAVE_UART_SPECIAL
select HAVE_UART_MEMORY_MAPPED

3
src/soc/nvidia/tegra132/Makefile.inc
View file

@ -4,7 +4,6 @@ CBOOTIMAGE_OPTS = --soc tegra132
bootblock-y += bootblock.c
bootblock-y += bootblock_asm.S
bootblock-y += cbfs.c
bootblock-y += timer.c
bootblock-y += clock.c
bootblock-y += spi.c
bootblock-y += i2c.c
@ -28,7 +27,6 @@ romstage-y += romstage_asm.S
romstage-y += addressmap.c
romstage-y += cbfs.c
romstage-y += cbmem.c
romstage-y += timer.c
romstage-y += ccplex.c
romstage-y += clock.c
romstage-y += cpu.c
@ -57,7 +55,6 @@ ramstage-y += cbfs.c
ramstage-y += cbmem.c
ramstage-y += cpu.c
ramstage-y += cpu_lib.S
ramstage-y += timer.c
ramstage-y += clock.c
ramstage-y += soc.c
ramstage-y += spi.c

45
src/soc/nvidia/tegra132/timer.c
View file

@ -1,45 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <timer.h>
#include <delay.h>
#include <thread.h>
void init_timer(void)
{
}
void udelay(unsigned usec)
{
struct stopwatch sw;
/*
* As the hardware clock granularity is in microseconds pad the
* requested delay by one to get at least >= requested usec delay.
*/
usec += 1;
if (!thread_yield_microseconds(usec))
return;
stopwatch_init_usecs_expire(&sw, usec);
while (!stopwatch_expired(&sw))
;
}

1
src/soc/rockchip/rk3288/Kconfig
View file

@ -22,6 +22,7 @@ config SOC_ROCKCHIP_RK3288
default n
select CPU_HAS_BOOTBLOCK_INIT
select HAVE_MONOTONIC_TIMER
select GENERIC_UDELAY
select HAVE_UART_SPECIAL
select EARLY_CONSOLE
select DYNAMIC_CBMEM

27
src/soc/rockchip/rk3288/timer.c
View file

@ -23,36 +23,9 @@
#include <arch/io.h>
#include "timer.h"
void init_timer(void)
{
}
void rk3288_init_timer(void)
{
write32(TIMER_LOAD_VAL, &timer7_ptr->timer_load_count0);
write32(TIMER_LOAD_VAL, &timer7_ptr->timer_load_count1);
write32(1, &timer7_ptr->timer_ctrl_reg);
}
/* delay x useconds */
void udelay(unsigned usec)
{
struct mono_time current, end;
timer_monotonic_get(&current);
end = current;
mono_time_add_usecs(&end, usec);
if (mono_time_after(&current, &end)) {
printk(BIOS_EMERG, "udelay: 0x%08x is impossibly large\n",
usec);
/* There's not much we can do if usec is too big. Use a long,
* paranoid delay value and hope for the best... */
end = current;
mono_time_add_usecs(&end, USECS_PER_SEC);
}
while (mono_time_before(&current, &end))
timer_monotonic_get(&current);
}

1
src/soc/samsung/exynos5250/Kconfig
View file

@ -1,6 +1,7 @@
config CPU_SAMSUNG_EXYNOS5250
select CPU_HAS_BOOTBLOCK_INIT
select HAVE_MONOTONIC_TIMER
select GENERIC_UDELAY
select HAVE_UART_SPECIAL
select EARLY_CONSOLE
select DYNAMIC_CBMEM

3
src/soc/samsung/exynos5250/Makefile.inc
View file

@ -10,7 +10,6 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
endif
bootblock-y += wakeup.c
bootblock-y += gpio.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += timer.c
romstage-y += spi.c alternate_cbfs.c
romstage-y += clock.c
@ -26,7 +25,6 @@ romstage-$(CONFIG_EARLY_CONSOLE) += uart.c
endif
romstage-y += wakeup.c
romstage-y += gpio.c
romstage-y += timer.c
romstage-y += trustzone.c
romstage-y += i2c.c
#romstage-y += wdt.c
@ -42,7 +40,6 @@ ramstage-y += cpu.c
ramstage-y += tmu.c
ramstage-y += mct.c
ramstage-y += monotonic_timer.c
ramstage-y += timer.c
ramstage-y += gpio.c
ramstage-y += i2c.c
ramstage-y += dp-reg.c

54
src/soc/samsung/exynos5250/timer.c
View file

@ -1,54 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 Samsung Electronics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <timer.h>
#include <delay.h>
#include "clk.h"
void init_timer(void)
{
/* Nothing to do because we manually
* call mct_start() in the bootblock
*/
}
/* delay x useconds */
void udelay(unsigned usec)
{
struct mono_time current, end;
timer_monotonic_get(&current);
end = current;
mono_time_add_usecs(&end, usec);
if (mono_time_after(&current, &end)) {
printk(BIOS_EMERG, "udelay: 0x%08x is impossibly large\n",
usec);
/* There's not much we can do if usec is too big. Use a long,
* paranoid delay value and hope for the best... */
end = current;
mono_time_add_usecs(&end, USECS_PER_SEC);
}
while (mono_time_before(&current, &end))
timer_monotonic_get(&current);
}

1
src/soc/samsung/exynos5420/Kconfig
View file

@ -1,6 +1,7 @@
config CPU_SAMSUNG_EXYNOS5420
select CPU_HAS_BOOTBLOCK_INIT
select HAVE_MONOTONIC_TIMER
select GENERIC_UDELAY
select HAVE_UART_SPECIAL
select EARLY_CONSOLE
select RELOCATABLE_MODULES

3
src/soc/samsung/exynos5420/Makefile.inc
View file

@ -10,7 +10,6 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
endif
bootblock-y += wakeup.c
bootblock-y += gpio.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += timer.c
romstage-y += spi.c alternate_cbfs.c
romstage-y += smp.c
@ -27,7 +26,6 @@ romstage-$(CONFIG_EARLY_CONSOLE) += uart.c
endif
romstage-y += wakeup.c
romstage-y += gpio.c
romstage-y += timer.c
romstage-y += i2c.c
#romstage-y += wdt.c
romstage-y += cbmem.c
@ -43,7 +41,6 @@ ramstage-y += cpu.c
ramstage-y += tmu.c
ramstage-y += mct.c
ramstage-y += monotonic_timer.c
ramstage-y += timer.c
ramstage-y += gpio.c
ramstage-y += i2c.c
ramstage-y += dp.c dp_lowlevel.c fimd.c

57
src/soc/samsung/exynos5420/timer.c
View file

@ -1,57 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 Samsung Electronics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <timer.h>
#include <delay.h>
#include <thread.h>
#include "clk.h"
void init_timer(void)
{
/* Nothing to do because we manually
* call mct_start() in the bootblock
*/
}
/* delay x useconds */
void udelay(unsigned usec)
{
struct mono_time current, end;
if (!thread_yield_microseconds(usec))
return;
timer_monotonic_get(&current);
end = current;
mono_time_add_usecs(&end, usec);
if (mono_time_after(&current, &end)) {
printk(BIOS_EMERG, "udelay: 0x%08x is impossibly large\n",
usec);
/* There's not much we can do if usec is too big. Use a long,
* paranoid delay value and hope for the best... */
end = current;
mono_time_add_usecs(&end, USECS_PER_SEC);
}
while (mono_time_before(&current, &end))
timer_monotonic_get(&current);
}