From 1a11dca12dffa6ce34915b8db2e18ec7862c10f1 Mon Sep 17 00:00:00 2001 From: Uwe Poeche Date: Tue, 11 Nov 2025 09:47:34 +0100 Subject: [PATCH] mb/siemens/mc_ehl6: Send POST codes to NC FPGA via PCI Enable the feature to send POST codes to the NC FPGA via PCI. This allows the POST codes to be visible on the embedded 7-segment display during coreboot runtime. Further sort switches in alphabetical order. TEST=Build and boot mc_ehl6. Verify that the POST Codes are correctly displayed on the embedded 7-segment display. Change-Id: Ie7e4961c0345312126eb2000c2934e33fce3b584 Signed-off-by: Uwe Poeche Reviewed-on: https://review.coreboot.org/c/coreboot/+/90091 Tested-by: build bot (Jenkins) Reviewed-by: Mario Scheithauer --- .../siemens/mc_ehl/variants/mc_ehl6/Kconfig | 16 ++++++++++++++++ .../siemens/mc_ehl/variants/mc_ehl6/Makefile.mk | 2 ++ .../siemens/mc_ehl/variants/mc_ehl6/post.c | 10 ++++++++++ 3 files changed, 28 insertions(+) create mode 100644 src/mainboard/siemens/mc_ehl/variants/mc_ehl6/post.c diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/Kconfig b/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/Kconfig index 8ebeec9679..c8cd345d7a 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/Kconfig +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/Kconfig @@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS select DRIVERS_ETH_PHY_M88E1512 select MAINBOARD_HAS_TPM2 select MEMORY_MAPPED_TPM + select NC_FPGA_POST_CODE select TPM_MEASURED_BOOT select TPM_MEASURED_BOOT_INIT_BOOTBLOCK @@ -21,4 +22,19 @@ config UART_FOR_CONSOLE int default 0 +config EARLY_PCI_BRIDGE_DEVICE + hex + depends on NC_FPGA_POST_CODE + default 0x1c + +config EARLY_PCI_BRIDGE_FUNCTION + hex + depends on NC_FPGA_POST_CODE + default 0x0 + +config EARLY_PCI_MMIO_BASE + hex + depends on NC_FPGA_POST_CODE + default 0xfe800000 + endif # BOARD_SIEMENS_MC_EHL6 diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/Makefile.mk b/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/Makefile.mk index 6e87f9fc1a..d9050f098d 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/Makefile.mk +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/Makefile.mk @@ -4,3 +4,5 @@ bootblock-y += gpio.c romstage-y += memory.c ramstage-y += gpio.c ramstage-y += mainboard.c + +all-$(CONFIG_NC_FPGA_POST_CODE) += post.c diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/post.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/post.c new file mode 100644 index 0000000000..c34e2539bc --- /dev/null +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/post.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +void mainboard_post(uint8_t value) +{ + nc_fpga_post(value); +}