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mb/google/fatcat/var/moonstone: Support new schematic changes

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Add FW_config support to distinguish schematic changes.
Refer to schamtics MB_V20250826 and DB_V20250821

BUG=b:442964982
TEST=emerge-fatcat coreboot

Change-Id: I0dd354cb1512521474a929bf4d1cfc786eb0a33c
Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89128
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ren Kuo 2025-09-09 19:06:19 +08:00 • committed by Subrata Banik
commit 18ae0c48e1
5 changed files with 276 additions and 40 deletions
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2
src/mainboard/google/fatcat/variants/moonstone/Makefile.mk
View file

@ -3,5 +3,7 @@
bootblock-y += gpio.c
romstage-y += gpio.c
romstage-y += memory.c
romstage-$(CONFIG_FW_CONFIG) += fw_config.c
ramstage-y += gpio.c
ramstage-$(CONFIG_FW_CONFIG) += variant.c
ramstage-$(CONFIG_FW_CONFIG) += fw_config.c

137
src/mainboard/google/fatcat/variants/moonstone/fw_config.c Normal file
View file

@ -0,0 +1,137 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
#include <console/console.h>
#include <fw_config.h>
#include <gpio.h>
#include <inttypes.h>
/* t: base table; o: override table */
#define GPIO_PADBASED_OVERRIDE(t, o) gpio_padbased_override(t, o, ARRAY_SIZE(o))
/* t: table */
#define GPIO_CONFIGURE_PADS(t) gpio_configure_pads(t, ARRAY_SIZE(t))
static const struct pad_config fp_spi_disable_pads[] = {
PAD_NC(GPP_C15, NONE),
PAD_NC(GPP_E11, NONE),
PAD_NC(GPP_E17, NONE),
PAD_NC(GPP_E20, NONE),
PAD_NC(GPP_E22, NONE),
PAD_NC(GPP_F14, NONE),
PAD_NC(GPP_F15, NONE),
};
static const struct pad_config fp_spi_enable_pads[] = {
/* GPP_C15: FPS_RST_N */
PAD_CFG_GPO_LOCK(GPP_C15, 1, LOCK_CONFIG),
/* GPP_E11: GPSI0_CLK */
PAD_CFG_NF(GPP_E11, NONE, DEEP, NF5),
/* GPP_E17: GSPI0_CS0 */
PAD_CFG_NF(GPP_E17, NONE, DEEP, NF5),
/* GPP_E20: FPMCU_FW_UPDATE */
PAD_CFG_GPO_LOCK(GPP_E20, 0, LOCK_CONFIG),
/* GPP_E22: FPS_SOC_INT_L */
PAD_CFG_GPI_IRQ_WAKE(GPP_E22, NONE, PWROK, LEVEL, INVERT),
/* GPP_F14: GPSI0A_MOSI */
PAD_CFG_NF(GPP_F14, NONE, DEEP, NF8),
/* GPP_F15: GSPI0A_MISO */
PAD_CFG_NF(GPP_F15, NONE, DEEP, NF8),
};
static const struct pad_config use_usb3c_enable_pads[] = {
/* GPP_C20: NC */
PAD_NC(GPP_C20, NONE),
/* GPP_C21: NC */
PAD_NC(GPP_C21, NONE),
/* GPP_C22: TBT_LSX3_TXD */
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
/* GPP_C23: TBT_LSX3_RXD */
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1),
/* GPP_B14: NC */
PAD_NC(GPP_B14, NONE),
/* GPP_B11: NC */
PAD_NC(GPP_B11, NONE),
/* GPP_E09: NC */
PAD_NC(GPP_E09, NONE),
};
static const struct pad_config use_usb2a2c_hdmi_enable_pads[] = {
/* GPP_C20: TBT_LSX2_TXD */
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
/* GPP_C21: TBT_LSX2_RXD */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* GPP_C22: DDP3_CTRLCLK */
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF2),
/* GPP_C23: DDP3_CTRLDATA */
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF2),
/* GPP_B14: DISP_HPD4 */
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF2),
/* GPP_B11: USB_OC1 */
PAD_CFG_NF(GPP_B11, NONE, DEEP, NF1),
/* GPP_E09: USB_OC0 */
PAD_CFG_NF(GPP_E09, NONE, DEEP, NF1),
};
static const struct pad_config pre_mem_fp_spi_enable_pads[] = {
/* GPP_C15: FPS_RST_N */
PAD_CFG_GPO(GPP_C15, 0, DEEP),
};
void fw_config_configure_pre_mem_gpio(void)
{
if (!fw_config_is_provisioned()) {
printk(BIOS_WARNING, "FW_CONFIG is not provisioned, Exiting\n");
return;
}
if (fw_config_probe(FW_CONFIG(FPMCU, FP_SPI)))
GPIO_CONFIGURE_PADS(pre_mem_fp_spi_enable_pads);
}
void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{
if (!fw_config_is_provisioned()) {
printk(BIOS_WARNING, "FW_CONFIG is not provisioned, Exiting\n");
return;
}
/*
*+-------+--------+-------------+
*| | FP_SPI | FP_USB |
*+-------+--------+-------------+
*| FPMCU | GSPI0 | usb2_port6 |
*+-------+--------+-------------+
*/
if (fw_config_probe(FW_CONFIG(FPMCU, FP_SPI))) {
GPIO_PADBASED_OVERRIDE(padbased_table, fp_spi_enable_pads);
} else {
GPIO_PADBASED_OVERRIDE(padbased_table, fp_spi_disable_pads);
}
/* Probe fw_config : "IO_PORT" to reconfigure port settings accordingly.
* proto0 : IO_PORT => "USB2A2C_HDMI:0"
* porot1.5: IO_PORT => "USB3C:1"
* +-----------------+------------------+------------------+
*| IO_PORT | USB2A2C_HDMI | USB3C |
*+-----------------+------------------+------------------+
*| tcss_usb3_port0 | USB4_C0 (MB-TBT) | USB4_C0 (MB-TBT) |
*+-----------------+------------------+------------------+
*| tcss_usb3_port1 | N/A | USB3.2 C2 (DB) |
*+-----------------+------------------+------------------+
*| tcss_usb3_port2 | USB4_C1 (MB-TBT) | N/A |
*+-----------------+------------------+------------------+
*| tcss_usb3_port3 | Fixed HDMI | USB4_C1 (MB-TBT) |
*+-----------------+------------------+------------------+
*| usb3_port1 | USB3_A0 | N/A |
*+-----------------+------------------+------------------+
*| usb3_port2 | USB3_A1 | N/A |
*+-----------------+------------------+------------------+
*| usb2_port5 | USB2_A0 | USB2_C2 (DB) |
*+-----------------+------------------+------------------+
*| usb2_port6 | USB2_A1 | USB_FP |
*+-----------------+------------------+------------------+
*/
if (fw_config_probe(FW_CONFIG(IO_PORT, USB3C)))
GPIO_PADBASED_OVERRIDE(padbased_table, use_usb3c_enable_pads);
else
GPIO_PADBASED_OVERRIDE(padbased_table, use_usb2a2c_hdmi_enable_pads);
}

32
src/mainboard/google/fatcat/variants/moonstone/gpio.c
View file

@ -69,14 +69,10 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_B09, NONE),
/* GPP_B10: NC */
PAD_NC(GPP_B10, NONE),
/* GPP_B11: USB_OC1 */
PAD_CFG_NF(GPP_B11, NONE, DEEP, NF1),
/* GPP_B12: PM_SLP_S0_N */
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
/* GPP_B13: PLT_RST_N */
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
/* GPP_B14: DISP_HPD4 */
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF2),
/* GPP_B15: NC */
PAD_NC(GPP_B15, NONE),
/* GPP_B16: GEN5_SSD_PWREN */
@ -132,8 +128,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1),
/* GPP_C14: NC */
PAD_NC(GPP_C14, NONE),
/* GPP_C15: FPS_RST_N */
PAD_CFG_GPO_LOCK(GPP_C15, 1, LOCK_CONFIG),
/* GPP_C16: TBT_LSX0_TXD */
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
/* GPP_C17: TBT_LSX0_RXD */
@ -142,14 +136,6 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_C18, NONE),
/* GPP_C19: NC */
PAD_NC(GPP_C19, NONE),
/* GPP_C20: TBT_LSX2_TXD */
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
/* GPP_C21: TBT_LSX2_RXD */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* GPP_C22: DDP3_CTRLCLK */
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF2),
/* GPP_C23: DDP3_CTRLDATA */
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF2),
/* GPP_D00: NC */
PAD_NC(GPP_D00, NONE),
@ -216,12 +202,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_APIC_LOCK(GPP_E07, NONE, LEVEL, INVERT, LOCK_CONFIG),
/* GPP_E08: NC */
PAD_NC(GPP_E08, NONE),
/* GPP_E09: USB_OC0 */
PAD_CFG_NF(GPP_E09, NONE, DEEP, NF1),
/* GPP_E10: NC */
PAD_NC(GPP_E10, NONE),
/* GPP_E11: GPSI0_CLK */
PAD_CFG_NF(GPP_E11, NONE, DEEP, NF5),
/* GPP_E12: TCHPAD_I2C4_SCL */
PAD_CFG_NF(GPP_E12, NONE, DEEP, NF8),
/* GPP_E13: TCHPAD_I2C4_SDA */
@ -232,18 +214,12 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_E15, NONE),
/* GPP_E16: NC */
PAD_NC(GPP_E16, NONE),
/* GPP_E17: GSPI0_CS0 */
PAD_CFG_NF(GPP_E17, NONE, DEEP, NF5),
/* GPP_E18: TCHPAD_INT# */
PAD_CFG_GPI_APIC(GPP_E18, NONE, PLTRST, LEVEL, INVERT),
/* GPP_E19: FPMCU_PWREN */
PAD_CFG_GPO(GPP_E19, 1, DEEP),
/* GPP_E20: FPMCU_FW_UPDATE */
PAD_CFG_GPO_LOCK(GPP_E20, 0, LOCK_CONFIG),
/* GPP_E21: I2C_PMC_PD_INT_N */
PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
/* GPP_E22: FPS_SOC_INT_L */
PAD_CFG_GPI_IRQ_WAKE(GPP_E22, NONE, PWROK, LEVEL, INVERT),
/* GPP_F00: M.2_CNV_BRI_DT_BT_UART2_RTS_N */
/* NOTE: IOSSTAGE: 'Ignore' for S0ix */
@ -279,10 +255,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_F12, NONE, DEEP, NF8),
/* GPP_F13: TCHSCR_I2C5_SDA */
PAD_CFG_NF(GPP_F13, NONE, DEEP, NF8),
/* GPP_F14: GPSI0A_MOSI */
PAD_CFG_NF(GPP_F14, NONE, DEEP, NF8),
/* GPP_F15: GSPI0A_MISO */
PAD_CFG_NF(GPP_F15, NONE, DEEP, NF8),
/* GPP_F16: TCHSCR_RST_L */
PAD_CFG_GPO(GPP_F16, 1, DEEP),
/* GPP_F17: NC */
@ -420,10 +392,6 @@ static const struct pad_config romstage_gpio_table[] = {
PAD_CFG_NF(GPP_C01, NONE, DEEP, NF1),
/* GPP_E03: GEN5_SSD_RESET_N */
PAD_CFG_GPO(GPP_E03, 1, PLTRST),
/* GPP_E19: FPMCU_PWREN */
PAD_CFG_GPO(GPP_E19, 0, DEEP),
/* GPP_C15: FPS_RST_N */
PAD_CFG_GPO(GPP_C15, 0, DEEP),
};
const struct pad_config *variant_gpio_table(size_t *num)

86
src/mainboard/google/fatcat/variants/moonstone/overridetree.cb
View file

@ -6,6 +6,15 @@ fw_config
option AUDIO_UNKNOWN 0
option AUDIO_ALC721_SNDW 1
end
field FPMCU 6 7
option FP_ABSENT 0
option FP_SPI 1
option FP_USB 2
end
field IO_PORT 12 12
option USB2A2C_HDMI 0
option USB3C 1
end
end
chip soc/intel/pantherlake
@ -38,6 +47,7 @@ chip soc/intel/pantherlake
register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)" # USB3_C1
register "tcss_cap_policy[0]" = "TCSS_TYPE_C_PORT_FULL_FUN"
register "tcss_cap_policy[1]" = "TCSS_TYPE_C_PORT_FULL_FUN"
register "tcss_cap_policy[2]" = "TCSS_TYPE_C_PORT_FULL_FUN"
register "tcss_cap_policy[3]" = "TCSS_TYPE_C_PORT_FULL_FUN"
@ -114,7 +124,12 @@ chip soc/intel/pantherlake
device ref iaa off end
device ref tbt_pcie_rp0 on end
device ref tbt_pcie_rp2 on end
device ref tbt_pcie_rp1 on
probe IO_PORT USB3C
end
device ref tbt_pcie_rp2 on
probe IO_PORT USB2A2C_HDMI
end
device ref tbt_pcie_rp3 on end
device ref tcss_xhci on
chip drivers/usb/acpi
@ -125,11 +140,29 @@ chip soc/intel/pantherlake
register "group" = "ACPI_PLD_GROUP(1, 2)"
device ref tcss_usb3_port0 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 2)"
device ref tcss_usb3_port1 on
probe IO_PORT USB3C
end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 2)"
device ref tcss_usb3_port2 on end
device ref tcss_usb3_port2 on
probe IO_PORT USB2A2C_HDMI
end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 2)"
device ref tcss_usb3_port3 on
probe IO_PORT USB3C
end
end
end
end
@ -146,7 +179,16 @@ chip soc/intel/pantherlake
chip drivers/intel/usb4/retimer
register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
use tcss_usb3_port2 as dfp[0].typec_port
device generic 0 on end
device generic 0 on
probe IO_PORT USB2A2C_HDMI
end
end
chip drivers/intel/usb4/retimer
register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
use tcss_usb3_port3 as dfp[0].typec_port
device generic 0 on
probe IO_PORT USB3C
end
end
end
@ -172,6 +214,14 @@ chip soc/intel/pantherlake
register "group" = "ACPI_PLD_GROUP(2, 1)"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)"
device ref usb2_port5 on
probe IO_PORT USB3C
end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Camera""
register "type" = "UPC_TYPE_INTERNAL"
@ -183,25 +233,42 @@ chip soc/intel/pantherlake
register "desc" = ""USB2 Type-A Port 0""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(3, 1)"
device ref usb2_port5 on end
device ref usb2_port5 on
probe IO_PORT USB2A2C_HDMI
end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port 1""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(4, 1)"
device ref usb2_port6 on end
device ref usb2_port6 on
probe IO_PORT USB2A2C_HDMI
end
end
chip drivers/usb/acpi
register "desc" = ""USB2 FPMCU""
register "type" = "UPC_TYPE_INTERNAL"
register "has_power_resource" = "true"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E19)"
device ref usb2_port6 on
probe FPMCU FP_USB
end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port 0""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(3, 2)"
device ref usb3_port1 on end
device ref usb3_port1 on
probe IO_PORT USB2A2C_HDMI
end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port 1""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(4, 2)"
device ref usb3_port2 on end
device ref usb3_port2 on
probe IO_PORT USB2A2C_HDMI
end
end
end
end
@ -285,6 +352,7 @@ chip soc/intel/pantherlake
end
end # I2C5
device ref gspi0 on
probe FPMCU FP_SPI
chip drivers/spi/acpi
register "name" = ""CRFP""
register "hid" = "ACPI_DT_NAMESPACE_HID"
@ -297,7 +365,9 @@ chip soc/intel/pantherlake
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C15)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E19)"
register "enable_delay_ms" = "3"
device spi 0 on end
device spi 0 on
probe FPMCU FP_SPI
end
end
end

59
src/mainboard/google/fatcat/variants/moonstone/variant.c
View file

@ -1,5 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <console/console.h>
#include <fw_config.h>
#include <sar.h>
@ -7,3 +10,59 @@ const char *get_wifi_sar_cbfs_filename(void)
{
return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI));
}
void variant_update_soc_chip_config(struct soc_intel_pantherlake_config *config)
{
/*
*+-------+--------+-------------+
*| | FP_SPI | FP_USB |
*+-------+--------+-------------+
*| FPMCU | GSPI0 | usb2_port6 |
*+-------+--------+-------------+
*/
if (fw_config_probe(FW_CONFIG(FPMCU, FP_USB))) {
printk(BIOS_INFO, "Disable GSPI\n");
config->serial_io_gspi_mode[PchSerialIoIndexGSPI0] = PchSerialIoDisabled;
printk(BIOS_INFO, "usb2_port6 to FP\n");
config->usb2_ports[5] = (struct usb2_port_config) USB2_PORT_MID(OC_SKIP);
}
/* Probe fw_config : "IO_PORT" to reconfigure port settings accordingly.
* proto0 : IO_PORT => "USB2A2C_HDMI:0"
* porot1.5: IO_PORT => "USB3C:1"
* +-----------------+------------------+------------------+
*| IO_PORT | USB2A2C_HDMI | USB3C |
*+-----------------+------------------+------------------+
*| tcss_usb3_port0 | USB4_C0 (MB-TBT) | USB4_C0 (MB-TBT) |
*+-----------------+------------------+------------------+
*| tcss_usb3_port1 | N/A | USB3.2 C2 (DB) |
*+-----------------+------------------+------------------+
*| tcss_usb3_port2 | USB4_C1 (MB-TBT) | N/A |
*+-----------------+------------------+------------------+
*| tcss_usb3_port3 | Fixed HDMI | USB4_C1 (MB-TBT) |
*+-----------------+------------------+------------------+
*| usb3_port1 | USB3_A0 | N/A |
*+-----------------+------------------+------------------+
*| usb3_port2 | USB3_A1 | N/A |
*+-----------------+------------------+------------------+
*| usb2_port5 | USB2_A0 | USB2_C2 (DB) |
*+-----------------+------------------+------------------+
*| usb2_port6 | USB2_A1 | USB_FP |
*+-----------------+------------------+------------------+
*/
if (fw_config_probe(FW_CONFIG(IO_PORT, USB3C))) {
printk(BIOS_INFO, "Disable Type-A Port A0/A1\n");
config->usb3_ports[0] = (struct usb3_port_config) USB3_PORT_EMPTY;
config->usb3_ports[1] = (struct usb3_port_config) USB3_PORT_EMPTY;
printk(BIOS_INFO, "usb2_port5 to USB2_C2(DB).\n");
config->usb2_ports[4] = (struct usb2_port_config) USB2_PORT_TYPE_C(OC_SKIP);
printk(BIOS_INFO, "Enable tcss_usb3_port1 to USB3_C2(DB)\n");
config->tcss_ports[1] = (struct tcss_port_config) TCSS_PORT_DEFAULT(OC_SKIP);
printk(BIOS_INFO, "Disable tcss_usb3_port2\n");
config->tcss_ports[2] = (struct tcss_port_config) TCSS_PORT_EMPTY;
printk(BIOS_INFO, "Enable tcss_usb3_port3 to USB3_C1(MB)\n");
config->tcss_ports[3] = (struct tcss_port_config) TCSS_PORT_DEFAULT(OC_SKIP);
}
}