mb/google/bluey: Add power sequencing for USB-C1 retimer
This patch implements the power-on and reset sequence for the USB-C1 retimer on the Bluey mainboard. Sequence Details: - romstage: Added early_setup_usb_typec to ensure all power rails (3.3V, 1.8V, 0.9V) are disabled and the retimer is held in reset early in the boot process. - ramstage (mainboard): Added setup_usb_typec to perform the power-up sequence with the required 1ms delays between rails to ensure hardware stability: BUG=b:473489095 TEST=Able to detect USB devices in HS mode. Change-Id: Ia93c0078aecdec98f3af28e73e7af5af7a3b20d8 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90699 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Pranava Y N <pranavayn@google.com> Reviewed-by: Jayvik Desai <jayvik@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
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3 changed files with 36 additions and 0 deletions
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@ -44,6 +44,12 @@
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#define GPIO_USB_CAM_RESET_L GPIO(10)
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#define GPIO_USB_CAM_ENABLE GPIO(206)
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/* USB-C1 port specific GPIOs */
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#define GPIO_USB_C1_EN_PP3300 GPIO(186)
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#define GPIO_USB_C1_EN_PP1800 GPIO(175)
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#define GPIO_USB_C1_EN_PP0900 GPIO(188)
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#define GPIO_USB_C1_RETIMER_RESET_L GPIO(176)
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void setup_chromeos_gpios(void);
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bool is_off_mode(void);
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void configure_parallel_charging(void);
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@ -6,6 +6,7 @@
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#include <commonlib/bsd/cbmem_id.h>
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#include <commonlib/coreboot_tables.h>
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#include <console/console.h>
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#include <delay.h>
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#include <device/device.h>
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#include <ec/google/chromeec/ec.h>
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#include <gpio.h>
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@ -50,8 +51,21 @@ static void enable_usb_camera(void)
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gpio_output(GPIO_USB_CAM_ENABLE, 1);
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}
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static void setup_usb_typec(void)
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{
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gpio_output(GPIO_USB_C1_EN_PP3300, 1);
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mdelay(1);
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gpio_output(GPIO_USB_C1_EN_PP1800, 1);
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mdelay(1);
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gpio_output(GPIO_USB_C1_EN_PP0900, 1);
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mdelay(1);
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gpio_output(GPIO_USB_C1_RETIMER_RESET_L, 1);
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}
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static void setup_usb(void)
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{
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setup_usb_typec();
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enable_usb_camera();
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setup_usb_host0();
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}
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@ -86,6 +86,19 @@ static void platform_dump_battery_soc_information(void)
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printk(BIOS_INFO, "Battery state-of-charge %d%%\n", batt_pct);
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}
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static void early_setup_usb_typec(void)
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{
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gpio_output(GPIO_USB_C1_RETIMER_RESET_L, 0);
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gpio_output(GPIO_USB_C1_EN_PP3300, 0);
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gpio_output(GPIO_USB_C1_EN_PP1800, 0);
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gpio_output(GPIO_USB_C1_EN_PP0900, 0);
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}
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static void early_setup_usb(void)
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{
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early_setup_usb_typec();
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}
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void platform_romstage_main(void)
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{
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/* Watchdog must be checked first to avoid erasing watchdog info later. */
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@ -107,6 +120,9 @@ void platform_romstage_main(void)
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qclib_rerun();
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/* Setup early USB related config */
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early_setup_usb();
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/*
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* Enable this power rail now for FPMCU stability prior to
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* its reset being deasserted in ramstage. This applies
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