From 1667cd29760497218d5e9a66471fd9648dfeca7b Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Fri, 17 Nov 2000 17:02:45 +0000 Subject: [PATCH] fixes. --- src/northbridge/via/vt8601/raminitspd.inc | 11 ++++++++--- src/sdram/smbus_pcibus.inc | 12 ++++++------ 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/src/northbridge/via/vt8601/raminitspd.inc b/src/northbridge/via/vt8601/raminitspd.inc index 0de4c91317..a691cef8e8 100644 --- a/src/northbridge/via/vt8601/raminitspd.inc +++ b/src/northbridge/via/vt8601/raminitspd.inc @@ -2,6 +2,8 @@ #define PM_DEVFN CONFIG_ADDR(0, 0x3c, 0) #define DRAM_CONFIG_PORT 0x5a #define REGISTERED_DRAM_REGISTER $0x69 +#define LAST_SMBUS_MEM_DEVICE SMBUS_MEM_DEVICE_2 + jmp raminitspd_end /* table of settings for initial registers */ register_table: @@ -21,9 +23,10 @@ register_table: /* set these to 0xee (128 MB VC SDRAM). In our working code we set to * 0x88, but VIA code recommends 0xee. Since we are SPD, in the end, * this initial setting will be over-ridden by SPD probe values. + * leave at 88 for now -- deal with this mess later */ - .byte 0x58, 0xee - .byte 0x59, 0xee + .byte 0x58, 0x88 + .byte 0x59, 0x88 /* size the banks at max, they will be resized later. */ .byte 0x5a, 0x20 .byte 0x5b, 0x40 @@ -41,7 +44,7 @@ ram_set_registers: /* address is first, then data */ movl $register_table, %esi 1: - /* zero out eax. In fact, this is unnecessary right now, but be safe */ + /* zero out eax. This is a must right here. */ xor %eax, %eax movb (%esi), %al testb %al, %al @@ -147,6 +150,8 @@ spd_set_nbxcfg_done: SET_RAM_COMMAND(RAM_COMMAND_MRS) ; \ COMPUTE_CAS_MODE ; \ shll $3, %eax ; \ + /* FIX ME -- set to cas3 no matter what for now */ ; \ + movl $0x1d0, %eax; \ movl %eax, %ebx ; \ DIMMS_READ_EBX_OFFSET diff --git a/src/sdram/smbus_pcibus.inc b/src/sdram/smbus_pcibus.inc index 381b2132d6..17cc823a73 100644 --- a/src/sdram/smbus_pcibus.inc +++ b/src/sdram/smbus_pcibus.inc @@ -259,7 +259,7 @@ spd_set_drb_loop_top: PCI_WRITE_CONFIG_BYTE addl $0x00020001, %ebx /* increment the smbus device & the config port */ - cmpb $SMBUS_MEM_DEVICE_3, %bl /* see if I have reached the end */ + cmpb $LAST_SMBUS_MEM_DEVICE, %bl /* see if I have reached the end */ jbe spd_set_drb_loop_top /* o.k. I'm done return now */ @@ -297,7 +297,7 @@ spd_set_dramc: jmp spd_set_dramc_out 2: addl $1, %ebx /* increment the device */ - cmpb $SMBUS_MEM_DEVICE_3, %bl + cmpb $LAST_SMBUS_MEM_DEVICE, %bl jbe 1b /* We couldn't find anything we must have no memory */ jmp no_memory @@ -337,7 +337,7 @@ spd_read_refresh: jmp spd_enable_refresh_out 2: addl $1, %ebx /* increment the device */ - cmpb $SMBUS_MEM_DEVICE_3, %bl + cmpb $LAST_SMBUS_MEM_DEVICE, %bl jbe 1b /* We couldn't find anything we must have no memory */ xorl %eax, %eax @@ -389,7 +389,7 @@ spd_set_rps: 2: addl $1, %ebx /* increment the device */ addl $4, %ecx /* increment the shift count */ - cmpb $SMBUS_MEM_DEVICE_3, %bl + cmpb $LAST_SMBUS_MEM_DEVICE, %bl jbe 1b movl $0x7f, %eax @@ -442,7 +442,7 @@ spd_set_pgpol: 2: addl $1, %ebx /* increment the device */ addl $2, %ecx /* increment the shift count */ - cmpb $SMBUS_MEM_DEVICE_3, %bl + cmpb $LAST_SMBUS_MEM_DEVICE, %bl jbe 1b shll $8, %esi @@ -497,7 +497,7 @@ spd_set_nbxcfg: 2: addl $1, %ebx /* increment the device */ addl $2, %ecx /* increment the shift count */ - cmpb $SMBUS_MEM_DEVICE_3, %bl + cmpb $LAST_SMBUS_MEM_DEVICE, %bl jbe 1b movl %esi, %edx