cpu/intel: Enter romstage without BIST
When entry to romstage is via cpu/intel/car/romstage.c BIST has not been passed down the path for sometime. Change-Id: I345975c53014902269cee21fc393331d33a84dce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
parent
146c098233
commit
157b189f6b
47 changed files with 63 additions and 182 deletions
|
|
@ -25,7 +25,6 @@
|
|||
#include <soc/mrc_wrapper.h>
|
||||
|
||||
struct romstage_params {
|
||||
unsigned long bist;
|
||||
struct mrc_params *mrc_params;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -115,10 +115,9 @@ static void spi_init(void)
|
|||
}
|
||||
|
||||
/* Entry from cache-as-ram.inc. */
|
||||
static void romstage_main(uint64_t tsc, uint32_t bist)
|
||||
static void romstage_main(uint64_t tsc)
|
||||
{
|
||||
struct romstage_params rp = {
|
||||
.bist = bist,
|
||||
.mrc_params = NULL,
|
||||
};
|
||||
|
||||
|
|
@ -159,7 +158,7 @@ static void romstage_main(uint64_t tsc, uint32_t bist)
|
|||
*/
|
||||
asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist)
|
||||
{
|
||||
romstage_main(base_timestamp, bist);
|
||||
romstage_main(base_timestamp);
|
||||
}
|
||||
|
||||
static struct chipset_power_state power_state;
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@ void fill_postcar_frame(struct postcar_frame *pcf)
|
|||
}
|
||||
|
||||
/* Entry from cpu/intel/car/romstage.c. */
|
||||
void mainboard_romstage_entry(unsigned long bist)
|
||||
void mainboard_romstage_entry(void)
|
||||
{
|
||||
struct romstage_params rp = { 0 };
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue