From 155041ad4cf85e4b4a4778c06259476b47276290 Mon Sep 17 00:00:00 2001 From: Hari L Date: Thu, 16 Oct 2025 17:24:09 +0530 Subject: [PATCH] soc/qualcomm/x1p42100: Add EUSB2 HS repeater support for USB Type-C Add usb_repeater_spmi_init() and usb_repeater_spmi_tune() functions for USB repeater internal to SMB2360 via SPMI configuration during HS PHY initialization. The usb_repeater_spmi_init() function enables Embedded USB2 control for both SMB1 and SMB2 cores, while usb_repeater_spmi_tune() configures optimal signal integrity parameters (IUSB2, USB2_SLEW, USB2_PREEM) for reliable Type-C connectivity. BUG=b:451814646 TEST=Verify USB2.0 (HS) works for C1 on Google/Bluey. Without this CL - USB2 key doesn't work for C1. Verified HS1 functionality by turning on L14B from coreboot. Before USB insertion: firmware-shell: md 0x0a800420 8 0a800420: 000002a0 00000000 00000000 00000000 ................ 0a800430: 000002a0 00000000 00000000 00000000 ................ firmware-shell: Added USB disk 2. firmware-shell: md 0x0a800420 8 0a800420: 00000e03 00000000 00000000 00000000 ................ 0a800430: 000002a0 00000000 00000000 00000000 ................ firmware-shell: Removed USB disk 2. firmware-shell: md 0x0a800420 8 0a800420: 000002a0 00000000 00000000 00000000 ................ 0a800430: 000002a0 00000000 00000000 00000000 ................ Change-Id: I24e0af062fc7a6b5effd9317ec5c0b2d89fe288e Signed-off-by: Hari L Reviewed-on: https://review.coreboot.org/c/coreboot/+/89613 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Kapil Porwal --- .../qualcomm/x1p42100/include/soc/usb/usb.h | 15 +++++++ src/soc/qualcomm/x1p42100/usb/usb.c | 40 ++++++++++++++++++- 2 files changed, 53 insertions(+), 2 deletions(-) diff --git a/src/soc/qualcomm/x1p42100/include/soc/usb/usb.h b/src/soc/qualcomm/x1p42100/include/soc/usb/usb.h index 4ac6dad763..f8aa9e9ccc 100644 --- a/src/soc/qualcomm/x1p42100/include/soc/usb/usb.h +++ b/src/soc/qualcomm/x1p42100/include/soc/usb/usb.h @@ -126,6 +126,21 @@ #define TYPEC_VBUS_STATUS_MASK BIT(5) #define CCOUT_INVERT_POLARITY 0x03 +/* USB Repeater SPMI Tune register offsets */ +#define EUSB2_TUNE_IUSB2 0xFD51 +#define EUSB2_TUNE_USB2_SLEW 0xFD55 +#define EUSB2_TUNE_USB2_PREEM 0xFD57 + +/* USB 2.0 tuning parameter values */ +#define EUSB2_TUNE_IUSB2_DEFAULT 0x06 /* +11.1% HS transmit amplitude (default) */ +#define EUSB2_TUNE_USB2_SLEW_FAST 0x02 /* +14.9% faster slew rate */ +#define EUSB2_TUNE_USB2_PREEM_25PCT 0x02 /* +25% pre-emphasis current */ + +/* USB Shared SPMI Init register offsets */ +#define EUSB2_EN_CTL1 0xFD46 +#define EUSB2_EN_CTL1_ENABLE BIT(7) +#define EUSB2_EN_CTL1_DISABLE 0x00 + /* Forward declaration */ struct dwc3_controller_config; diff --git a/src/soc/qualcomm/x1p42100/usb/usb.c b/src/soc/qualcomm/x1p42100/usb/usb.c index 9e91391d06..e97650773d 100644 --- a/src/soc/qualcomm/x1p42100/usb/usb.c +++ b/src/soc/qualcomm/x1p42100/usb/usb.c @@ -444,6 +444,42 @@ static const struct dwc3_controller_config sec_config = { .smb_slave_addr = SMB2_SLAVE_ID, }; +/* + * usb_repeater_spmi_tune - Configures USB repeater SPMI tuning parameters + * @config: Controller configuration containing SMB slave address + */ +static void usb_repeater_spmi_tune(const struct dwc3_controller_config *config) +{ + u8 slave = config->smb_slave_addr; + + /* Configure USB 2.0 output current tuning - default +11.1% amplitude */ + spmi_write8(SPMI_ADDR(slave, EUSB2_TUNE_IUSB2), EUSB2_TUNE_IUSB2_DEFAULT); + + /* Configure USB 2.0 HS TX slew rate - +14.9% faster than default */ + spmi_write8(SPMI_ADDR(slave, EUSB2_TUNE_USB2_SLEW), EUSB2_TUNE_USB2_SLEW_FAST); + + /* Configure USB 2.0 HS TX pre-emphasis - +25% current boost */ + spmi_write8(SPMI_ADDR(slave, EUSB2_TUNE_USB2_PREEM), EUSB2_TUNE_USB2_PREEM_25PCT); +} + +/* + * usb_repeater_spmi_init - Initializes USB repeater SPMI with enable-delay-disable sequence + * @config: Controller configuration containing SMB slave address + */ +static void usb_repeater_spmi_init(const struct dwc3_controller_config *config) +{ + u8 slave = config->smb_slave_addr; + + spmi_write8(SPMI_ADDR(slave, EUSB2_EN_CTL1), EUSB2_EN_CTL1_DISABLE); + udelay(50); + spmi_write8(SPMI_ADDR(slave, EUSB2_EN_CTL1), EUSB2_EN_CTL1_ENABLE); + + printk(BIOS_INFO, "Enabling %s EUSB2_EN_CTL1\n", config->name); + + /* Call tune API after initialization */ + usb_repeater_spmi_tune(config); +} + /* * get_usb_typec_polarity - Reads Type-C polarity from PMIC * @config: Controller configuration containing SMB slave address @@ -530,7 +566,7 @@ static void setup_usb_host(struct usb_dwc3_cfg *dwc3) clock_reset_bcr(dwc3->gcc_qusb2phy_prim_bcr, 1); udelay(10); clock_reset_bcr(dwc3->gcc_qusb2phy_prim_bcr, 0); - /* TBD:usb_shared_repeater_reset,usb_shared_repeater_init */ + usb_repeater_spmi_init(&prim_config); /* Initialize secondary HS PHY */ hs_usb_phy_init(2); @@ -559,7 +595,7 @@ static void setup_usb_host(struct usb_dwc3_cfg *dwc3) clock_reset_bcr(dwc3->gcc_qusb2phy_sec_bcr, 1); udelay(10); clock_reset_bcr(dwc3->gcc_qusb2phy_sec_bcr, 0); - /* TBD:usb_shared_repeater_reset,usb_shared_repeater_init for secondary */ + usb_repeater_spmi_init(&sec_config); /* Initialize secondary HS PHY */ hs_usb_phy_init(3);