From 14ff47783b97d748c81d20cc4b27f90325c219ae Mon Sep 17 00:00:00 2001
From: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Date: Thu, 20 Feb 2025 15:37:46 +0800
Subject: [PATCH] mb/google/nissa/var/dirks: Update ddi_ports_config

Update ddi_ports_config to match VBT's settings.

DDI_PORT_A = HDMI
DDI_PORT_B = HDMI
DDI_PORT_1 = Type-C DP

BUG=b:389391653
TEST=emerge-nissa coreboot

Change-Id: I67e9fcf4a3caa303ec8d873507a7533389c095ae
Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86537
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
---
 .../google/brya/variants/dirks/overridetree.cb         | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/mainboard/google/brya/variants/dirks/overridetree.cb b/src/mainboard/google/brya/variants/dirks/overridetree.cb
index bc1c1867bb..a953b4ca76 100644
--- a/src/mainboard/google/brya/variants/dirks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/dirks/overridetree.cb
@@ -87,6 +87,16 @@ chip soc/intel/alderlake
 	# Enable the Cnvi BT Audio Offload
 	register "cnvi_bt_audio_offload" = "1"
 
+	# Disable eDP on DDI portA
+	register "ddi_portA_config" = "0"
+
+	# Enable HPD and DDC for DDI port A
+	register "ddi_ports_config" = "{
+		[DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
+		[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
+		[DDI_PORT_1] = DDI_ENABLE_HPD
+	}"
+
 	# Intel Common SoC Config
 	#+-------------------+---------------------------+
 	#| Field             |  Value                    |