nb/via/cx700: Scan PCI bus and probe resources

Change-Id: I1268a8f886ff395ff822b14a5427a5031260c541
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83389
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/northbridge/via/cx700/Makefile.mk

@@ -7,7 +7,7 @@ CFLAGS_romstage  += --param=min-pagesize=0
 
 bootblock-y	+= early_smbus.c bootblock.c
 romstage-y	+= early_smbus.c memmap.c romstage.c raminit.c
-ramstage-y	+= memmap.c chip.c
+ramstage-y	+= memmap.c chip.c northbridge.c
 all-y		+= clock.c reset.c
 
 endif

src/northbridge/via/cx700/chipset.cb

@@ -1,6 +1,7 @@
 chip northbridge/via/cx700
 
 	device domain 0 on
+		ops domain_ops
 
 		device pci 00.0 alias host_ctrl	on  end
 		device pci 00.1 alias host_err	on  end

src/northbridge/via/cx700/northbridge.c

@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/device.h>
+
+struct device_operations domain_ops = {
+	.read_resources	  = pci_domain_read_resources,
+	.set_resources	  = pci_domain_set_resources,
+	.scan_bus	  = pci_host_bridge_scan_bus,
+};