soc/intel/common: Add RPP-S PCI IDs

Add PCI IDs to support Raptor Point PCH.

Ref: Intel 700 Series PCH Datasheet, Volume 1 (#743835, rev 2)
Change-Id: Iee410ed3179260b08d45f50e8126fb815c686324
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73437
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jeremy Soller 2023-05-17 14:52:03 -06:00 committed by Felix Held
commit 14d69d03b7
15 changed files with 140 additions and 0 deletions

View file

@ -54,6 +54,10 @@ static const unsigned short wifi_pci_device_ids[] = {
PCI_DID_INTEL_ADL_N_CNVI_WIFI_1,
PCI_DID_INTEL_ADL_N_CNVI_WIFI_2,
PCI_DID_INTEL_ADL_N_CNVI_WIFI_3,
PCI_DID_INTEL_RPL_S_CNVI_WIFI_0,
PCI_DID_INTEL_RPL_S_CNVI_WIFI_1,
PCI_DID_INTEL_RPL_S_CNVI_WIFI_2,
PCI_DID_INTEL_RPL_S_CNVI_WIFI_3,
0
};

View file

@ -1490,6 +1490,10 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADP_M_CSE1,
PCI_DID_INTEL_ADP_M_CSE2,
PCI_DID_INTEL_ADP_M_CSE3,
PCI_DID_INTEL_RPP_S_CSE0,
PCI_DID_INTEL_RPP_S_CSE1,
PCI_DID_INTEL_RPP_S_CSE2,
PCI_DID_INTEL_RPP_S_CSE3,
0,
};

View file

@ -22,6 +22,14 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_MTL_AUDIO_7,
PCI_DID_INTEL_MTL_AUDIO_8,
PCI_DID_INTEL_RPP_P_AUDIO,
PCI_DID_INTEL_RPP_S_AUDIO_1,
PCI_DID_INTEL_RPP_S_AUDIO_2,
PCI_DID_INTEL_RPP_S_AUDIO_3,
PCI_DID_INTEL_RPP_S_AUDIO_4,
PCI_DID_INTEL_RPP_S_AUDIO_5,
PCI_DID_INTEL_RPP_S_AUDIO_6,
PCI_DID_INTEL_RPP_S_AUDIO_7,
PCI_DID_INTEL_RPP_S_AUDIO_8,
PCI_DID_INTEL_APL_AUDIO,
PCI_DID_INTEL_CNL_AUDIO,
PCI_DID_INTEL_GLK_AUDIO,

View file

@ -578,6 +578,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LWB_SPI_SUPER,
PCI_DID_INTEL_MCC_SPI0,
PCI_DID_INTEL_MTL_HWSEQ_SPI,
PCI_DID_INTEL_RPP_S_HWSEQ_SPI,
PCI_DID_INTEL_SPR_HWSEQ_SPI,
PCI_DID_INTEL_TGP_SPI0,
0

View file

@ -30,6 +30,14 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_MTL_AUDIO_7,
PCI_DID_INTEL_MTL_AUDIO_8,
PCI_DID_INTEL_RPP_P_AUDIO,
PCI_DID_INTEL_RPP_S_AUDIO_1,
PCI_DID_INTEL_RPP_S_AUDIO_2,
PCI_DID_INTEL_RPP_S_AUDIO_3,
PCI_DID_INTEL_RPP_S_AUDIO_4,
PCI_DID_INTEL_RPP_S_AUDIO_5,
PCI_DID_INTEL_RPP_S_AUDIO_6,
PCI_DID_INTEL_RPP_S_AUDIO_7,
PCI_DID_INTEL_RPP_S_AUDIO_8,
PCI_DID_INTEL_APL_AUDIO,
PCI_DID_INTEL_GLK_AUDIO,
PCI_DID_INTEL_LWB_AUDIO,

View file

@ -271,6 +271,12 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADP_M_N_I2C3,
PCI_DID_INTEL_ADP_M_N_I2C4,
PCI_DID_INTEL_ADP_M_N_I2C5,
PCI_DID_INTEL_RPP_S_I2C0,
PCI_DID_INTEL_RPP_S_I2C1,
PCI_DID_INTEL_RPP_S_I2C2,
PCI_DID_INTEL_RPP_S_I2C3,
PCI_DID_INTEL_RPP_S_I2C4,
PCI_DID_INTEL_RPP_S_I2C5,
0,
};

View file

@ -328,6 +328,34 @@ static const unsigned short pcie_device_ids[] = {
PCI_DID_INTEL_ADP_M_N_PCIE_RP10,
PCI_DID_INTEL_ADP_N_PCIE_RP11,
PCI_DID_INTEL_ADP_N_PCIE_RP12,
PCI_DID_INTEL_RPP_S_PCIE_RP1,
PCI_DID_INTEL_RPP_S_PCIE_RP2,
PCI_DID_INTEL_RPP_S_PCIE_RP3,
PCI_DID_INTEL_RPP_S_PCIE_RP4,
PCI_DID_INTEL_RPP_S_PCIE_RP5,
PCI_DID_INTEL_RPP_S_PCIE_RP6,
PCI_DID_INTEL_RPP_S_PCIE_RP7,
PCI_DID_INTEL_RPP_S_PCIE_RP8,
PCI_DID_INTEL_RPP_S_PCIE_RP9,
PCI_DID_INTEL_RPP_S_PCIE_RP10,
PCI_DID_INTEL_RPP_S_PCIE_RP11,
PCI_DID_INTEL_RPP_S_PCIE_RP12,
PCI_DID_INTEL_RPP_S_PCIE_RP13,
PCI_DID_INTEL_RPP_S_PCIE_RP14,
PCI_DID_INTEL_RPP_S_PCIE_RP15,
PCI_DID_INTEL_RPP_S_PCIE_RP16,
PCI_DID_INTEL_RPP_S_PCIE_RP17,
PCI_DID_INTEL_RPP_S_PCIE_RP18,
PCI_DID_INTEL_RPP_S_PCIE_RP19,
PCI_DID_INTEL_RPP_S_PCIE_RP20,
PCI_DID_INTEL_RPP_S_PCIE_RP21,
PCI_DID_INTEL_RPP_S_PCIE_RP22,
PCI_DID_INTEL_RPP_S_PCIE_RP23,
PCI_DID_INTEL_RPP_S_PCIE_RP24,
PCI_DID_INTEL_RPP_S_PCIE_RP25,
PCI_DID_INTEL_RPP_S_PCIE_RP26,
PCI_DID_INTEL_RPP_S_PCIE_RP27,
PCI_DID_INTEL_RPP_S_PCIE_RP28,
0
};

View file

@ -16,6 +16,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_MTL_SATA,
PCI_DID_INTEL_RPP_P_SATA_1,
PCI_DID_INTEL_RPP_P_SATA_2,
PCI_DID_INTEL_RPP_S_SATA,
PCI_DID_INTEL_LWB_SATA_AHCI,
PCI_DID_INTEL_LWB_SSATA_AHCI,
PCI_DID_INTEL_LWB_SATA_RAID,

View file

@ -52,6 +52,7 @@ struct device_operations smbus_ops = {
static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_MTL_SMBUS,
PCI_DID_INTEL_RPP_P_SMBUS,
PCI_DID_INTEL_RPP_S_SMBUS,
PCI_DID_INTEL_APL_SMBUS,
PCI_DID_INTEL_GLK_SMBUS,
PCI_DID_INTEL_CNL_SMBUS,

View file

@ -182,6 +182,10 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADP_M_N_SPI0,
PCI_DID_INTEL_ADP_M_N_SPI1,
PCI_DID_INTEL_ADP_M_SPI2,
PCI_DID_INTEL_RPP_S_SPI0,
PCI_DID_INTEL_RPP_S_SPI1,
PCI_DID_INTEL_RPP_S_SPI2,
PCI_DID_INTEL_RPP_S_SPI3,
PCI_DID_INTEL_DNV_SPI,
0
};

View file

@ -48,6 +48,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADP_S_PMC_CRASHLOG_SRAM,
PCI_DID_INTEL_ADP_P_PMC_CRASHLOG_SRAM,
PCI_DID_INTEL_ADP_N_PMC_CRASHLOG_SRAM,
PCI_DID_INTEL_RPP_S_PMC_CRASHLOG_SRAM,
0,
};

View file

@ -406,6 +406,10 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADP_M_N_UART1,
PCI_DID_INTEL_ADP_M_N_UART2,
PCI_DID_INTEL_ADP_M_N_UART3,
PCI_DID_INTEL_RPP_S_UART0,
PCI_DID_INTEL_RPP_S_UART1,
PCI_DID_INTEL_RPP_S_UART2,
PCI_DID_INTEL_RPP_S_UART3,
0,
};

View file

@ -43,6 +43,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADP_P_XDCI,
PCI_DID_INTEL_ADP_S_XDCI,
PCI_DID_INTEL_ADP_M_XDCI,
PCI_DID_INTEL_RPP_S_XDCI,
0
};

View file

@ -148,6 +148,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADP_P_XHCI,
PCI_DID_INTEL_ADP_S_XHCI,
PCI_DID_INTEL_ADP_M_XHCI,
PCI_DID_INTEL_RPP_S_XHCI,
0
};