broadwell_fsp: Add intel FSP "driver" from coreboot.org
This is the unified FSP interface code from coreboot.org. To present a consistent interface with the FSPs for all of the different CPUs, and to cut down on code maintenance, all of the FSPs use this interface. Bug=None Test=Builds and runs on Broadwell Change-Id: Idcca5c42b06c47c67946c706e424e0349405ddf0 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: https://chromium-review.googlesource.com/221182 Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-by: Marc Jones <marc.jones@se-eng.com> Commit-Queue: Leroy P Leahy <leroy.p.leahy@intel.com> Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://chromium-review.googlesource.com/229573 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
parent
6026ca5ad0
commit
145a6a5409
11 changed files with 1194 additions and 28 deletions
|
|
@ -79,6 +79,7 @@
|
|||
#define CBMEM_ID_TIMESTAMP 0x54494d45
|
||||
#define CBMEM_ID_VBOOT_HANDOFF 0x780074f0
|
||||
#define CBMEM_ID_NONE 0x00000000
|
||||
#define CBMEM_ID_HOB_POINTER 0x484f4221
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
#include <stdint.h>
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
|
||||
#ifndef __LIB_H__
|
||||
#define __LIB_H__
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef __PRE_RAM__ /* Conflicts with inline function in arch/io.h */
|
||||
|
|
@ -53,6 +54,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
|
|||
#endif
|
||||
|
||||
/* Defined in src/lib/hexdump.c */
|
||||
void hexdump(unsigned long memory, int length);
|
||||
void hexdump(const void *memory, size_t length);
|
||||
void hexdump32(char LEVEL, const void *d, size_t len);
|
||||
|
||||
#endif /* __LIB_H__ */
|
||||
|
|
|
|||
|
|
@ -47,12 +47,16 @@ enum timestamp_id {
|
|||
TS_START_BOOTBLOCK = 11,
|
||||
TS_END_BOOTBLOCK = 12,
|
||||
TS_DEVICE_ENUMERATE = 30,
|
||||
TS_FSP_BEFORE_ENUMERATE,
|
||||
TS_FSP_AFTER_ENUMERATE,
|
||||
TS_DEVICE_CONFIGURE = 40,
|
||||
TS_DEVICE_ENABLE = 50,
|
||||
TS_DEVICE_INITIALIZE = 60,
|
||||
TS_DEVICE_DONE = 70,
|
||||
TS_CBMEM_POST = 75,
|
||||
TS_WRITE_TABLES = 80,
|
||||
TS_FSP_BEFORE_FINALIZE,
|
||||
TS_FSP_AFTER_FINALIZE,
|
||||
TS_LOAD_PAYLOAD = 90,
|
||||
TS_ACPI_WAKE_JUMP = 98,
|
||||
TS_SELFBOOT_JUMP = 99,
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue