From 13897bde9a1acfaa3c08a232884cb888776e61c2 Mon Sep 17 00:00:00 2001 From: Luca Lai Date: Mon, 11 Aug 2025 16:59:00 +0800 Subject: [PATCH] mb/google/trulo/var/pujjolo: Add wlan rtd3 setting Because of preventing S0ix fail caused by wlan, so according to intel suggestion, add wlan rtd3 setting. BUG=b:422600523 TEST= Build and boot to OS and check S0ix test using `suspend_stress_test -c 5` work fine. Change-Id: I959da35d60e0da058727519d6db082ea415dbe2a Signed-off-by: Luca Lai Reviewed-on: https://review.coreboot.org/c/coreboot/+/88743 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/mainboard/google/brya/variants/pujjolo/overridetree.cb | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/mainboard/google/brya/variants/pujjolo/overridetree.cb b/src/mainboard/google/brya/variants/pujjolo/overridetree.cb index c8479ee655..0ccb3c634a 100644 --- a/src/mainboard/google/brya/variants/pujjolo/overridetree.cb +++ b/src/mainboard/google/brya/variants/pujjolo/overridetree.cb @@ -548,6 +548,12 @@ chip soc/intel/alderlake register "add_acpi_dma_property" = "true" device pci 00.0 on end end + chip soc/intel/common/block/pcie/rtd3 + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E10)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)" + register "srcclk_pin" = "3" + device generic 0 on end + end end device ref pcie_rp7 on # Enable SD Card PCIE 7 using clk 3