diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c
index 183988171f..f8fc31ce82 100644
--- a/src/lib/reg_script.c
+++ b/src/lib/reg_script.c
@@ -31,7 +31,7 @@
 #endif
 
 #if CONFIG_SOC_INTEL_BAYTRAIL
-#include <baytrail/iosf.h>
+#include <soc/iosf.h>	/* TODO: wrap in <soc/reg_script.h, remove #ifdef? */
 #endif
 
 #define POLL_DELAY 100 /* 100us */
diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c
index 890e1df966..981116bfe4 100644
--- a/src/mainboard/google/rambi/acpi_tables.c
+++ b/src/mainboard/google/rambi/acpi_tables.c
@@ -30,9 +30,9 @@
 #include <device/pci_ids.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
 
 extern const unsigned char AmlCode[];
 
diff --git a/src/mainboard/google/rambi/chromeos.c b/src/mainboard/google/rambi/chromeos.c
index 0a12af4c60..b29b0791c3 100644
--- a/src/mainboard/google/rambi/chromeos.c
+++ b/src/mainboard/google/rambi/chromeos.c
@@ -22,7 +22,7 @@
 #include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
 
 #if CONFIG_EC_GOOGLE_CHROMEEC
 #include "ec.h"
diff --git a/src/mainboard/google/rambi/fadt.c b/src/mainboard/google/rambi/fadt.c
index 0bd33e14a1..dfd258fa8b 100644
--- a/src/mainboard/google/rambi/fadt.c
+++ b/src/mainboard/google/rambi/fadt.c
@@ -18,7 +18,7 @@
  */
 
 #include <string.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
diff --git a/src/mainboard/google/rambi/gpio.c b/src/mainboard/google/rambi/gpio.c
index 77f56f7c94..45f536db21 100644
--- a/src/mainboard/google/rambi/gpio.c
+++ b/src/mainboard/google/rambi/gpio.c
@@ -18,7 +18,7 @@
  */
 
 #include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
 #include "irqroute.h"
 
 /* TODO(SHAWNN): Modify gpios labeled 'INT' for interrupt handling */
diff --git a/src/mainboard/google/rambi/irqroute.h b/src/mainboard/google/rambi/irqroute.h
index 0f4ca17acc..074e47093e 100644
--- a/src/mainboard/google/rambi/irqroute.h
+++ b/src/mainboard/google/rambi/irqroute.h
@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <soc/intel/baytrail/baytrail/irq.h>
-#include <soc/intel/baytrail/baytrail/pci_devs.h>
-#include <soc/intel/baytrail/baytrail/pmc.h>
+#include <soc/irq.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
 
 #define PCI_DEV_PIRQ_ROUTES \
 	PCI_DEV_PIRQ_ROUTE(GFX_DEV,  A, B, C, D), \
diff --git a/src/mainboard/google/rambi/mainboard.c b/src/mainboard/google/rambi/mainboard.c
index 45ab9e8fe4..90a7495269 100644
--- a/src/mainboard/google/rambi/mainboard.c
+++ b/src/mainboard/google/rambi/mainboard.c
@@ -36,7 +36,7 @@
 #include <smbios.h>
 #include "ec.h"
 #include "onboard.h"
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
 #include <bootstate.h>
 
 void mainboard_suspend_resume(void)
diff --git a/src/mainboard/google/rambi/mainboard_smi.c b/src/mainboard/google/rambi/mainboard_smi.c
index f2bb7e97ad..57c5835e9a 100644
--- a/src/mainboard/google/rambi/mainboard_smi.c
+++ b/src/mainboard/google/rambi/mainboard_smi.c
@@ -25,8 +25,8 @@
 #include <ec/google/chromeec/ec.h>
 #include "ec.h"
 
-#include <baytrail/nvs.h>
-#include <baytrail/pmc.h>
+#include <soc/nvs.h>
+#include <soc/pmc.h>
 
 /* The wake gpio is SUS_GPIO[0]. */
 #define WAKE_GPIO_EN SUS_GPIO_EN0
diff --git a/src/mainboard/google/rambi/romstage.c b/src/mainboard/google/rambi/romstage.c
index 89c21de40f..d9fbc0cced 100644
--- a/src/mainboard/google/rambi/romstage.c
+++ b/src/mainboard/google/rambi/romstage.c
@@ -21,9 +21,9 @@
 #include <string.h>
 #include <cbfs.h>
 #include <console/console.h>
-#include <baytrail/gpio.h>
-#include <baytrail/mrc_wrapper.h>
-#include <baytrail/romstage.h>
+#include <soc/gpio.h>
+#include <soc/mrc_wrapper.h>
+#include <soc/romstage.h>
 
 /*
  * RAM_ID[2:0] are on GPIO_SSUS[39:37]
diff --git a/src/mainboard/google/rambi/w25q64.c b/src/mainboard/google/rambi/w25q64.c
index dbc26e4732..9692b4c10a 100644
--- a/src/mainboard/google/rambi/w25q64.c
+++ b/src/mainboard/google/rambi/w25q64.c
@@ -18,7 +18,7 @@
  */
 
 #include <string.h>
-#include <baytrail/spi.h>
+#include <soc/spi.h>
 
 /*
  * SPI lockdown configuration W25Q64FW.
diff --git a/src/mainboard/intel/bayleybay/acpi_tables.c b/src/mainboard/intel/bayleybay/acpi_tables.c
index 890e1df966..981116bfe4 100644
--- a/src/mainboard/intel/bayleybay/acpi_tables.c
+++ b/src/mainboard/intel/bayleybay/acpi_tables.c
@@ -30,9 +30,9 @@
 #include <device/pci_ids.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
 
 extern const unsigned char AmlCode[];
 
diff --git a/src/mainboard/intel/bayleybay/fadt.c b/src/mainboard/intel/bayleybay/fadt.c
index 0bd33e14a1..dfd258fa8b 100644
--- a/src/mainboard/intel/bayleybay/fadt.c
+++ b/src/mainboard/intel/bayleybay/fadt.c
@@ -18,7 +18,7 @@
  */
 
 #include <string.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
diff --git a/src/mainboard/intel/bayleybay/gpio.c b/src/mainboard/intel/bayleybay/gpio.c
index cbeb8aad69..f8f730379f 100644
--- a/src/mainboard/intel/bayleybay/gpio.c
+++ b/src/mainboard/intel/bayleybay/gpio.c
@@ -18,7 +18,7 @@
  */
 
 #include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
 #include "irqroute.h"
 
 /* NCORE GPIOs */
diff --git a/src/mainboard/intel/bayleybay/irqroute.h b/src/mainboard/intel/bayleybay/irqroute.h
index 20f421b5b8..2f75a2b951 100644
--- a/src/mainboard/intel/bayleybay/irqroute.h
+++ b/src/mainboard/intel/bayleybay/irqroute.h
@@ -17,8 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <soc/intel/baytrail/baytrail/irq.h>
-#include <soc/intel/baytrail/baytrail/pci_devs.h>
+#include <soc/irq.h>
+#include <soc/pci_devs.h>
 
 #define PCI_DEV_PIRQ_ROUTES \
 	PCI_DEV_PIRQ_ROUTE(GFX_DEV,  A, B, C, D), \
diff --git a/src/mainboard/intel/bayleybay/mainboard_smi.c b/src/mainboard/intel/bayleybay/mainboard_smi.c
index 0571baf32f..dc60e07e5e 100644
--- a/src/mainboard/intel/bayleybay/mainboard_smi.c
+++ b/src/mainboard/intel/bayleybay/mainboard_smi.c
@@ -20,7 +20,7 @@
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
-#include <baytrail/nvs.h>
+#include <soc/nvs.h>
 
 int mainboard_io_trap_handler(int smif)
 {
diff --git a/src/mainboard/intel/bayleybay/romstage.c b/src/mainboard/intel/bayleybay/romstage.c
index f8451731b8..5e5debc644 100644
--- a/src/mainboard/intel/bayleybay/romstage.c
+++ b/src/mainboard/intel/bayleybay/romstage.c
@@ -20,8 +20,8 @@
 #include <stdint.h>
 #include <string.h>
 #include <console/console.h>
-#include <baytrail/mrc_wrapper.h>
-#include <baytrail/romstage.h>
+#include <soc/mrc_wrapper.h>
+#include <soc/romstage.h>
 
 void mainboard_romstage_entry(struct romstage_params *rp)
 {
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc
index 4ab16a01eb..112b5303e4 100644
--- a/src/soc/intel/baytrail/Makefile.inc
+++ b/src/soc/intel/baytrail/Makefile.inc
@@ -54,7 +54,7 @@ ramstage-$(CONFIG_ALT_CBFS_LOAD_PAYLOAD) += spi_loading.c
 # Remove as ramstage gets fleshed out
 ramstage-y += placeholders.c
 
-INCLUDES += -Isrc/soc/intel/baytrail/
+INCLUDES += -Isrc/soc/intel/baytrail/include
 
 # Run an intermediate step when producing coreboot.rom
 # that adds additional components to the final firmware
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c
index aae0c9961a..940f1f3652 100644
--- a/src/soc/intel/baytrail/acpi.c
+++ b/src/soc/intel/baytrail/acpi.c
@@ -33,12 +33,12 @@
 #include <cpu/x86/tsc.h>
 #include <cpu/intel/turbo.h>
 
-#include <baytrail/acpi.h>
-#include <baytrail/iomap.h>
-#include <baytrail/irq.h>
-#include <baytrail/msr.h>
-#include <baytrail/pattrs.h>
-#include <baytrail/pmc.h>
+#include <soc/acpi.h>
+#include <soc/iomap.h>
+#include <soc/irq.h>
+#include <soc/msr.h>
+#include <soc/pattrs.h>
+#include <soc/pmc.h>
 
 #include <ec/google/chromeec/ec.h>
 #include <vendorcode/google/chromeos/gnvs.h>
diff --git a/src/soc/intel/baytrail/acpi/gpio.asl b/src/soc/intel/baytrail/acpi/gpio.asl
index 5e734881ab..aa6af717c1 100644
--- a/src/soc/intel/baytrail/acpi/gpio.asl
+++ b/src/soc/intel/baytrail/acpi/gpio.asl
@@ -19,8 +19,8 @@
  * MA 02110-1301 USA
  */
 
-#include <soc/intel/baytrail/baytrail/iomap.h>
-#include <soc/intel/baytrail/baytrail/irq.h>
+#include <soc/iomap.h>
+#include <soc/irq.h>
 
 /* SouthCluster GPIO */
 Device (GPSC)
diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl
index 354515ba67..47151a30fa 100644
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -19,8 +19,8 @@
  * MA 02110-1301 USA
  */
 
-#include <soc/intel/baytrail/baytrail/iomap.h>
-#include <soc/intel/baytrail/baytrail/irq.h>
+#include <soc/iomap.h>
+#include <soc/irq.h>
 
 Scope(\)
 {
diff --git a/src/soc/intel/baytrail/bootblock/bootblock.c b/src/soc/intel/baytrail/bootblock/bootblock.c
index fa0d9eee8d..6eedbd0372 100644
--- a/src/soc/intel/baytrail/bootblock/bootblock.c
+++ b/src/soc/intel/baytrail/bootblock/bootblock.c
@@ -21,7 +21,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
-#include <baytrail/iosf.h>
+#include <soc/iosf.h>
 #include <cpu/intel/microcode/microcode.c>
 
 static void set_var_mtrr(int reg, uint32_t base, uint32_t size, int type)
diff --git a/src/soc/intel/baytrail/chip.c b/src/soc/intel/baytrail/chip.c
index 5ea00a6bbe..b842713fbc 100644
--- a/src/soc/intel/baytrail/chip.c
+++ b/src/soc/intel/baytrail/chip.c
@@ -21,8 +21,8 @@
 #include <device/device.h>
 #include <device/pci.h>
 
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
 #include "chip.h"
 
 static void pci_domain_set_resources(device_t dev)
diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c
index e8f95ae167..f4d752eb94 100644
--- a/src/soc/intel/baytrail/cpu.c
+++ b/src/soc/intel/baytrail/cpu.c
@@ -30,11 +30,11 @@
 #include <cpu/x86/smm.h>
 #include <reg_script.h>
 
-#include <baytrail/iosf.h>
-#include <baytrail/msr.h>
-#include <baytrail/pattrs.h>
-#include <baytrail/ramstage.h>
-#include <baytrail/smm.h>
+#include <soc/iosf.h>
+#include <soc/msr.h>
+#include <soc/pattrs.h>
+#include <soc/ramstage.h>
+#include <soc/smm.h>
 
 static void smm_relocate(void *unused);
 static void enable_smis(void *unused);
diff --git a/src/soc/intel/baytrail/dptf.c b/src/soc/intel/baytrail/dptf.c
index 044a807906..a7274e0933 100644
--- a/src/soc/intel/baytrail/dptf.c
+++ b/src/soc/intel/baytrail/dptf.c
@@ -22,7 +22,7 @@
 #include <bootstate.h>
 #include <console/console.h>
 #include <reg_script.h>
-#include <baytrail/iosf.h>
+#include <soc/iosf.h>
 
 static const struct reg_script dptf_init_settings[] = {
 	/* SocThermInit */
diff --git a/src/soc/intel/baytrail/ehci.c b/src/soc/intel/baytrail/ehci.c
index d5bd45f8bb..0c7082c51b 100644
--- a/src/soc/intel/baytrail/ehci.c
+++ b/src/soc/intel/baytrail/ehci.c
@@ -25,12 +25,12 @@
 #include <stdint.h>
 #include <reg_script.h>
 
-#include <baytrail/iomap.h>
-#include <baytrail/iosf.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/ramstage.h>
-#include <baytrail/ehci.h>
+#include <soc/iomap.h>
+#include <soc/iosf.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/ramstage.h>
+#include <soc/ehci.h>
 
 #include "chip.h"
 
diff --git a/src/soc/intel/baytrail/elog.c b/src/soc/intel/baytrail/elog.c
index f50d1301f3..d352390e45 100644
--- a/src/soc/intel/baytrail/elog.c
+++ b/src/soc/intel/baytrail/elog.c
@@ -28,8 +28,8 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <elog.h>
-#include <baytrail/iomap.h>
-#include <baytrail/pmc.h>
+#include <soc/iomap.h>
+#include <soc/pmc.h>
 
 static void log_power_and_resets(const struct chipset_power_state *ps)
 {
diff --git a/src/soc/intel/baytrail/emmc.c b/src/soc/intel/baytrail/emmc.c
index f88614bfc5..1708428506 100644
--- a/src/soc/intel/baytrail/emmc.c
+++ b/src/soc/intel/baytrail/emmc.c
@@ -25,10 +25,10 @@
 #include <device/pci_ids.h>
 #include <reg_script.h>
 
-#include <baytrail/iosf.h>
-#include <baytrail/nvs.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/iosf.h>
+#include <soc/nvs.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
 #include "chip.h"
 
 static const struct reg_script emmc_ops[] = {
diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c
index 9b9fa49acb..a97dd61c0d 100644
--- a/src/soc/intel/baytrail/gfx.c
+++ b/src/soc/intel/baytrail/gfx.c
@@ -25,10 +25,10 @@
 #include <device/pci_ids.h>
 #include <reg_script.h>
 
-#include <baytrail/gfx.h>
-#include <baytrail/iosf.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/gfx.h>
+#include <soc/iosf.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
 
 #include "chip.h"
 
diff --git a/src/soc/intel/baytrail/gpio.c b/src/soc/intel/baytrail/gpio.c
index 43e52ef9a0..6e737d1704 100644
--- a/src/soc/intel/baytrail/gpio.c
+++ b/src/soc/intel/baytrail/gpio.c
@@ -19,9 +19,9 @@
 
 #include <device/pci.h>
 #include <console/console.h>
-#include <baytrail/gpio.h>
-#include <baytrail/pmc.h>
-#include <baytrail/smm.h>
+#include <soc/gpio.h>
+#include <soc/pmc.h>
+#include <soc/smm.h>
 
 /* GPIO-to-Pad LUTs */
 static const u8 gpncore_gpio_to_pad[GPNCORE_COUNT] =
diff --git a/src/soc/intel/baytrail/hda.c b/src/soc/intel/baytrail/hda.c
index c23e54096f..2e70e39f30 100644
--- a/src/soc/intel/baytrail/hda.c
+++ b/src/soc/intel/baytrail/hda.c
@@ -25,10 +25,10 @@
 #include <reg_script.h>
 
 #include <soc/intel/common/hda_verb.h>
-#include <baytrail/iomap.h>
-#include <baytrail/iosf.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/iomap.h>
+#include <soc/iosf.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
 
 static const struct reg_script init_ops[] = {
 	/* Enable no snoop traffic. */
diff --git a/src/soc/intel/baytrail/baytrail/acpi.h b/src/soc/intel/baytrail/include/soc/acpi.h
similarity index 97%
rename from src/soc/intel/baytrail/baytrail/acpi.h
rename to src/soc/intel/baytrail/include/soc/acpi.h
index a7ee82cd74..f1b571ae2f 100644
--- a/src/soc/intel/baytrail/baytrail/acpi.h
+++ b/src/soc/intel/baytrail/include/soc/acpi.h
@@ -21,7 +21,7 @@
 #define _BAYTRAIL_ACPI_H_
 
 #include <arch/acpi.h>
-#include <baytrail/nvs.h>
+#include <soc/nvs.h>
 
 void acpi_create_intel_hpet(acpi_hpet_t * hpet);
 void acpi_fill_in_fadt(acpi_fadt_t *fadt);
diff --git a/src/soc/intel/baytrail/baytrail/device_nvs.h b/src/soc/intel/baytrail/include/soc/device_nvs.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/device_nvs.h
rename to src/soc/intel/baytrail/include/soc/device_nvs.h
diff --git a/src/soc/intel/baytrail/baytrail/efi_wrapper.h b/src/soc/intel/baytrail/include/soc/efi_wrapper.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/efi_wrapper.h
rename to src/soc/intel/baytrail/include/soc/efi_wrapper.h
diff --git a/src/soc/intel/baytrail/baytrail/ehci.h b/src/soc/intel/baytrail/include/soc/ehci.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/ehci.h
rename to src/soc/intel/baytrail/include/soc/ehci.h
diff --git a/src/soc/intel/baytrail/baytrail/gfx.h b/src/soc/intel/baytrail/include/soc/gfx.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/gfx.h
rename to src/soc/intel/baytrail/include/soc/gfx.h
diff --git a/src/soc/intel/baytrail/baytrail/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h
similarity index 99%
rename from src/soc/intel/baytrail/baytrail/gpio.h
rename to src/soc/intel/baytrail/include/soc/gpio.h
index 5071b09b79..70bf1f9239 100644
--- a/src/soc/intel/baytrail/baytrail/gpio.h
+++ b/src/soc/intel/baytrail/include/soc/gpio.h
@@ -22,7 +22,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <baytrail/iomap.h>
+#include <soc/iomap.h>
 
 /* #define GPIO_DEBUG */
 
diff --git a/src/soc/intel/baytrail/baytrail/iomap.h b/src/soc/intel/baytrail/include/soc/iomap.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/iomap.h
rename to src/soc/intel/baytrail/include/soc/iomap.h
diff --git a/src/soc/intel/baytrail/baytrail/iosf.h b/src/soc/intel/baytrail/include/soc/iosf.h
similarity index 99%
rename from src/soc/intel/baytrail/baytrail/iosf.h
rename to src/soc/intel/baytrail/include/soc/iosf.h
index 9da86f5bb1..8bda618347 100644
--- a/src/soc/intel/baytrail/baytrail/iosf.h
+++ b/src/soc/intel/baytrail/include/soc/iosf.h
@@ -21,7 +21,7 @@
 #define _BAYTRAIL_IOSF_H_
 
 #include <stdint.h>
-#include <baytrail/pci_devs.h>
+#include <soc/pci_devs.h>
 
 /*
  * The Bay Trail SoC has a message network called IOSF Sideband. The access
diff --git a/src/soc/intel/baytrail/baytrail/irq.h b/src/soc/intel/baytrail/include/soc/irq.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/irq.h
rename to src/soc/intel/baytrail/include/soc/irq.h
diff --git a/src/soc/intel/baytrail/baytrail/lpc.h b/src/soc/intel/baytrail/include/soc/lpc.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/lpc.h
rename to src/soc/intel/baytrail/include/soc/lpc.h
diff --git a/src/soc/intel/baytrail/baytrail/mrc_wrapper.h b/src/soc/intel/baytrail/include/soc/mrc_wrapper.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/mrc_wrapper.h
rename to src/soc/intel/baytrail/include/soc/mrc_wrapper.h
diff --git a/src/soc/intel/baytrail/baytrail/msr.h b/src/soc/intel/baytrail/include/soc/msr.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/msr.h
rename to src/soc/intel/baytrail/include/soc/msr.h
diff --git a/src/soc/intel/baytrail/baytrail/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h
similarity index 98%
rename from src/soc/intel/baytrail/baytrail/nvs.h
rename to src/soc/intel/baytrail/include/soc/nvs.h
index b1561f74f9..c909d567e5 100644
--- a/src/soc/intel/baytrail/baytrail/nvs.h
+++ b/src/soc/intel/baytrail/include/soc/nvs.h
@@ -22,7 +22,7 @@
 #define _BAYTRAIL_NVS_H_
 
 #include <vendorcode/google/chromeos/gnvs.h>
-#include <baytrail/device_nvs.h>
+#include <soc/device_nvs.h>
 
 typedef struct {
 	/* Miscellaneous */
diff --git a/src/soc/intel/baytrail/baytrail/pattrs.h b/src/soc/intel/baytrail/include/soc/pattrs.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/pattrs.h
rename to src/soc/intel/baytrail/include/soc/pattrs.h
diff --git a/src/soc/intel/baytrail/baytrail/pci_devs.h b/src/soc/intel/baytrail/include/soc/pci_devs.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/pci_devs.h
rename to src/soc/intel/baytrail/include/soc/pci_devs.h
diff --git a/src/soc/intel/baytrail/baytrail/pcie.h b/src/soc/intel/baytrail/include/soc/pcie.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/pcie.h
rename to src/soc/intel/baytrail/include/soc/pcie.h
diff --git a/src/soc/intel/baytrail/baytrail/pmc.h b/src/soc/intel/baytrail/include/soc/pmc.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/pmc.h
rename to src/soc/intel/baytrail/include/soc/pmc.h
diff --git a/src/soc/intel/baytrail/baytrail/ramstage.h b/src/soc/intel/baytrail/include/soc/ramstage.h
similarity index 97%
rename from src/soc/intel/baytrail/baytrail/ramstage.h
rename to src/soc/intel/baytrail/include/soc/ramstage.h
index a8b5fdcc61..0ed83bd1d4 100644
--- a/src/soc/intel/baytrail/baytrail/ramstage.h
+++ b/src/soc/intel/baytrail/include/soc/ramstage.h
@@ -21,7 +21,7 @@
 #define _BAYTRAIL_RAMSTAGE_H_
 
 #include <device/device.h>
-#include <chip.h>
+#include <soc/intel/baytrail/chip.h>
 
 /* The baytrail_init_pre_device() function is called prior to device
  * initialization, but it's after console and cbmem has been reinitialized. */
diff --git a/src/soc/intel/baytrail/baytrail/reset.h b/src/soc/intel/baytrail/include/soc/reset.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/reset.h
rename to src/soc/intel/baytrail/include/soc/reset.h
diff --git a/src/soc/intel/baytrail/baytrail/romstage.h b/src/soc/intel/baytrail/include/soc/romstage.h
similarity index 98%
rename from src/soc/intel/baytrail/baytrail/romstage.h
rename to src/soc/intel/baytrail/include/soc/romstage.h
index 9ea3564fa3..f63621bc04 100644
--- a/src/soc/intel/baytrail/baytrail/romstage.h
+++ b/src/soc/intel/baytrail/include/soc/romstage.h
@@ -26,7 +26,7 @@
 
 #include <stdint.h>
 #include <arch/cpu.h>
-#include <baytrail/mrc_wrapper.h>
+#include <soc/mrc_wrapper.h>
 
 #define NUM_ROMSTAGE_TS 4
 struct romstage_timestamps {
diff --git a/src/soc/intel/baytrail/baytrail/sata.h b/src/soc/intel/baytrail/include/soc/sata.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/sata.h
rename to src/soc/intel/baytrail/include/soc/sata.h
diff --git a/src/soc/intel/baytrail/baytrail/smm.h b/src/soc/intel/baytrail/include/soc/smm.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/smm.h
rename to src/soc/intel/baytrail/include/soc/smm.h
diff --git a/src/soc/intel/baytrail/baytrail/spi.h b/src/soc/intel/baytrail/include/soc/spi.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/spi.h
rename to src/soc/intel/baytrail/include/soc/spi.h
diff --git a/src/soc/intel/baytrail/baytrail/xhci.h b/src/soc/intel/baytrail/include/soc/xhci.h
similarity index 100%
rename from src/soc/intel/baytrail/baytrail/xhci.h
rename to src/soc/intel/baytrail/include/soc/xhci.h
diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c
index 2b07e2b844..bcc6f0e30e 100644
--- a/src/soc/intel/baytrail/iosf.c
+++ b/src/soc/intel/baytrail/iosf.c
@@ -18,7 +18,7 @@
  */
 
 #include <arch/io.h>
-#include <baytrail/iosf.h>
+#include <soc/iosf.h>
 
 #if !defined(__PRE_RAM__)
 #define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12))
diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c
index 581f42bfa9..bee9d2ef5d 100644
--- a/src/soc/intel/baytrail/lpe.c
+++ b/src/soc/intel/baytrail/lpe.c
@@ -25,14 +25,14 @@
 #include <device/pci_ids.h>
 #include <reg_script.h>
 
-#include <baytrail/iomap.h>
-#include <baytrail/iosf.h>
-#include <baytrail/lpc.h>
-#include <baytrail/nvs.h>
-#include <baytrail/pattrs.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/ramstage.h>
+#include <soc/iomap.h>
+#include <soc/iosf.h>
+#include <soc/lpc.h>
+#include <soc/nvs.h>
+#include <soc/pattrs.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/ramstage.h>
 #include "chip.h"
 
 
diff --git a/src/soc/intel/baytrail/lpss.c b/src/soc/intel/baytrail/lpss.c
index 3ee648a55c..caa945cc31 100644
--- a/src/soc/intel/baytrail/lpss.c
+++ b/src/soc/intel/baytrail/lpss.c
@@ -26,10 +26,10 @@
 #include <device/pci_ids.h>
 #include <reg_script.h>
 
-#include <baytrail/iosf.h>
-#include <baytrail/nvs.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/iosf.h>
+#include <soc/nvs.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
 
 #include "chip.h"
 
diff --git a/src/soc/intel/baytrail/memmap.c b/src/soc/intel/baytrail/memmap.c
index 01f65336ca..2d6c644be6 100644
--- a/src/soc/intel/baytrail/memmap.c
+++ b/src/soc/intel/baytrail/memmap.c
@@ -19,8 +19,8 @@
 
 #include <arch/io.h>
 #include <cbmem.h>
-#include <baytrail/iosf.h>
-#include <baytrail/smm.h>
+#include <soc/iosf.h>
+#include <soc/smm.h>
 
 
 void *smm_region_start(void)
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index 6052477745..35f1d13ad1 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -24,10 +24,10 @@
 #include <device/pci_ids.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
-#include <baytrail/iomap.h>
-#include <baytrail/iosf.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/iomap.h>
+#include <soc/iosf.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
 
 /* Host Memory Map:
  *
diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c
index fe661542d9..aa9802423d 100644
--- a/src/soc/intel/baytrail/pcie.c
+++ b/src/soc/intel/baytrail/pcie.c
@@ -24,10 +24,10 @@
 #include <device/pci_ids.h>
 #include <reg_script.h>
 
-#include <baytrail/pci_devs.h>
-#include <baytrail/pcie.h>
-#include <baytrail/ramstage.h>
-#include <baytrail/smm.h>
+#include <soc/pci_devs.h>
+#include <soc/pcie.h>
+#include <soc/ramstage.h>
+#include <soc/smm.h>
 
 #include "chip.h"
 
diff --git a/src/soc/intel/baytrail/perf_power.c b/src/soc/intel/baytrail/perf_power.c
index 2cde77f36b..467e586506 100644
--- a/src/soc/intel/baytrail/perf_power.c
+++ b/src/soc/intel/baytrail/perf_power.c
@@ -22,7 +22,7 @@
 #include <bootstate.h>
 #include <console/console.h>
 #include <reg_script.h>
-#include <baytrail/iosf.h>
+#include <soc/iosf.h>
 
 #define MAKE_MASK_INCLUSIVE(msb) \
 	((1ULL << (1 + (msb))) - 1)
diff --git a/src/soc/intel/baytrail/placeholders.c b/src/soc/intel/baytrail/placeholders.c
index 9e1413da94..3495c30c72 100644
--- a/src/soc/intel/baytrail/placeholders.c
+++ b/src/soc/intel/baytrail/placeholders.c
@@ -2,7 +2,7 @@
 #include <arch/acpi.h>
 #include <cpu/cpu.h>
 #include <device/pci_rom.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
 
 
 void smm_init(void) {}
diff --git a/src/soc/intel/baytrail/pmutil.c b/src/soc/intel/baytrail/pmutil.c
index aee37261be..2b0bc455a6 100644
--- a/src/soc/intel/baytrail/pmutil.c
+++ b/src/soc/intel/baytrail/pmutil.c
@@ -21,10 +21,10 @@
 #include <arch/io.h>
 #include <console/console.h>
 
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
 
 #if defined(__SMM__)
 
diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c
index 96229307aa..b172ade020 100644
--- a/src/soc/intel/baytrail/ramstage.c
+++ b/src/soc/intel/baytrail/ramstage.c
@@ -30,14 +30,14 @@
 #include <romstage_handoff.h>
 #include <stdlib.h>
 
-#include <baytrail/gpio.h>
-#include <baytrail/lpc.h>
-#include <baytrail/msr.h>
-#include <baytrail/nvs.h>
-#include <baytrail/pattrs.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/ramstage.h>
+#include <soc/gpio.h>
+#include <soc/lpc.h>
+#include <soc/msr.h>
+#include <soc/nvs.h>
+#include <soc/pattrs.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/ramstage.h>
 
 /* Global PATTRS */
 DEFINE_PATTRS;
diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c
index 019e0a5e29..50eb084014 100644
--- a/src/soc/intel/baytrail/refcode.c
+++ b/src/soc/intel/baytrail/refcode.c
@@ -26,8 +26,8 @@
 #include <ramstage_cache.h>
 #include <vendorcode/google/chromeos/vboot_handoff.h>
 
-#include <baytrail/ramstage.h>
-#include <baytrail/efi_wrapper.h>
+#include <soc/ramstage.h>
+#include <soc/efi_wrapper.h>
 
 static inline int is_s3_resume(void)
 {
diff --git a/src/soc/intel/baytrail/reset.c b/src/soc/intel/baytrail/reset.c
index a421ec9018..c4cb2abfb7 100644
--- a/src/soc/intel/baytrail/reset.c
+++ b/src/soc/intel/baytrail/reset.c
@@ -18,8 +18,8 @@
  */
 
 #include <arch/io.h>
-#include <baytrail/pmc.h>
-#include <baytrail/reset.h>
+#include <soc/pmc.h>
+#include <soc/reset.h>
 
 void cold_reset(void)
 {
diff --git a/src/soc/intel/baytrail/romstage/com1.c b/src/soc/intel/baytrail/romstage/com1.c
index e46237ac1d..7705746b9e 100644
--- a/src/soc/intel/baytrail/romstage/com1.c
+++ b/src/soc/intel/baytrail/romstage/com1.c
@@ -18,11 +18,11 @@
  */
 
 #include <arch/io.h>
-#include <baytrail/gpio.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/romstage.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
 
 void byt_config_com1_and_enable(void)
 {
diff --git a/src/soc/intel/baytrail/romstage/early_spi.c b/src/soc/intel/baytrail/romstage/early_spi.c
index 6188f075fc..2c48af1698 100644
--- a/src/soc/intel/baytrail/romstage/early_spi.c
+++ b/src/soc/intel/baytrail/romstage/early_spi.c
@@ -22,9 +22,9 @@
 #include <delay.h>
 #include <console/console.h>
 
-#include <baytrail/iomap.h>
-#include <baytrail/romstage.h>
-#include <baytrail/spi.h>
+#include <soc/iomap.h>
+#include <soc/romstage.h>
+#include <soc/spi.h>
 
 #define SPI_CYCLE_DELAY 10 				/* 10us */
 #define SPI_CYCLE_TIMEOUT 400000 / SPI_CYCLE_DELAY	/* 400ms */
diff --git a/src/soc/intel/baytrail/romstage/gfx.c b/src/soc/intel/baytrail/romstage/gfx.c
index 592d1feaf8..f9bb9c9e8f 100644
--- a/src/soc/intel/baytrail/romstage/gfx.c
+++ b/src/soc/intel/baytrail/romstage/gfx.c
@@ -18,9 +18,9 @@
  */
 
 #include <arch/io.h>
-#include <baytrail/gfx.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/romstage.h>
+#include <soc/gfx.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
 
 void gfx_init(void)
 {
diff --git a/src/soc/intel/baytrail/romstage/pmc.c b/src/soc/intel/baytrail/romstage/pmc.c
index a72e159dc2..20db6e6d99 100644
--- a/src/soc/intel/baytrail/romstage/pmc.c
+++ b/src/soc/intel/baytrail/romstage/pmc.c
@@ -22,12 +22,12 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci_def.h>
-#include <baytrail/iomap.h>
-#include <baytrail/iosf.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/romstage.h>
+#include <soc/iomap.h>
+#include <soc/iosf.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/romstage.h>
 #include "../chip.h"
 
 void tco_disable(void)
diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c
index d010009645..d9354dbc99 100644
--- a/src/soc/intel/baytrail/romstage/raminit.c
+++ b/src/soc/intel/baytrail/romstage/raminit.c
@@ -24,13 +24,13 @@
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/pci_def.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
 #include <soc/intel/common/mrc_cache.h>
-#include <baytrail/iomap.h>
-#include <baytrail/iosf.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/reset.h>
-#include <baytrail/romstage.h>
+#include <soc/iomap.h>
+#include <soc/iosf.h>
+#include <soc/pci_devs.h>
+#include <soc/reset.h>
+#include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/ec_commands.h>
 
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index b75642a9bd..c43e78f083 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -34,15 +34,15 @@
 #include <romstage_handoff.h>
 #include <timestamp.h>
 #include <vendorcode/google/chromeos/chromeos.h>
-#include <baytrail/gpio.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/reset.h>
-#include <baytrail/romstage.h>
-#include <baytrail/smm.h>
-#include <baytrail/spi.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/reset.h>
+#include <soc/romstage.h>
+#include <soc/smm.h>
+#include <soc/spi.h>
 
 /* The cache-as-ram assembly file calls romstage_main() after setting up
  * cache-as-ram.  romstage_main() will then call the mainboards's
diff --git a/src/soc/intel/baytrail/sata.c b/src/soc/intel/baytrail/sata.c
index 18b7fdfb83..7021b98a18 100644
--- a/src/soc/intel/baytrail/sata.c
+++ b/src/soc/intel/baytrail/sata.c
@@ -18,9 +18,9 @@
  */
 
 #include <arch/io.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
-#include <baytrail/sata.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
+#include <soc/sata.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>
diff --git a/src/soc/intel/baytrail/scc.c b/src/soc/intel/baytrail/scc.c
index 7efb66dba1..6400996ace 100644
--- a/src/soc/intel/baytrail/scc.c
+++ b/src/soc/intel/baytrail/scc.c
@@ -25,9 +25,9 @@
 #include <device/pci_ids.h>
 #include <reg_script.h>
 
-#include <baytrail/iosf.h>
-#include <baytrail/nvs.h>
-#include <baytrail/ramstage.h>
+#include <soc/iosf.h>
+#include <soc/nvs.h>
+#include <soc/ramstage.h>
 
 static const struct reg_script scc_start_dll[] = {
 	/* Configure master DLL. */
diff --git a/src/soc/intel/baytrail/sd.c b/src/soc/intel/baytrail/sd.c
index 97c8628bc9..577469d3aa 100644
--- a/src/soc/intel/baytrail/sd.c
+++ b/src/soc/intel/baytrail/sd.c
@@ -24,10 +24,10 @@
 #include <device/pci_ids.h>
 #include <reg_script.h>
 
-#include <baytrail/iosf.h>
-#include <baytrail/nvs.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/iosf.h>
+#include <soc/nvs.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
 #include "chip.h"
 
 #define CAP_OVERRIDE_LOW 0xa0
diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c
index 21dfc6668f..aa1ee68811 100644
--- a/src/soc/intel/baytrail/smihandler.c
+++ b/src/soc/intel/baytrail/smihandler.c
@@ -28,10 +28,10 @@
 #include <elog.h>
 #include <spi-generic.h>
 
-#include <baytrail/iosf.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/nvs.h>
+#include <soc/iosf.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/nvs.h>
 
 /* GNVS needs to be set by coreboot initiating a software SMI. */
 static global_nvs_t *gnvs;
diff --git a/src/soc/intel/baytrail/smm.c b/src/soc/intel/baytrail/smm.c
index daf759d206..be13617d7d 100644
--- a/src/soc/intel/baytrail/smm.c
+++ b/src/soc/intel/baytrail/smm.c
@@ -27,9 +27,9 @@
 #include <cpu/x86/smm.h>
 #include <string.h>
 
-#include <baytrail/iomap.h>
-#include <baytrail/pmc.h>
-#include <baytrail/smm.h>
+#include <soc/iomap.h>
+#include <soc/pmc.h>
+#include <soc/smm.h>
 
 /* Save settings which will be committed in SMI functions. */
 static uint32_t smm_save_params[SMM_SAVE_PARAM_COUNT];
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 1fca774d48..e651439f72 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -32,14 +32,14 @@
 #include <romstage_handoff.h>
 #include <uart8250.h>
 
-#include <baytrail/iomap.h>
-#include <baytrail/irq.h>
-#include <baytrail/lpc.h>
-#include <baytrail/nvs.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/ramstage.h>
-#include <baytrail/spi.h>
+#include <soc/iomap.h>
+#include <soc/irq.h>
+#include <soc/lpc.h>
+#include <soc/nvs.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/ramstage.h>
+#include <soc/spi.h>
 #include "chip.h"
 
 static inline void
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index 34ea488e7f..0cff010625 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -31,8 +31,8 @@
 #include <device/pci_ids.h>
 #include <spi_flash.h>
 
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
 
 #ifdef __SMM__
 #define pci_read_config_byte(dev, reg, targ)\
diff --git a/src/soc/intel/baytrail/stage_cache.c b/src/soc/intel/baytrail/stage_cache.c
index 3bda56d968..d51746fbd1 100644
--- a/src/soc/intel/baytrail/stage_cache.c
+++ b/src/soc/intel/baytrail/stage_cache.c
@@ -19,7 +19,7 @@
 
 #include <cbmem.h>
 #include <ramstage_cache.h>
-#include <baytrail/smm.h>
+#include <soc/smm.h>
 
 struct ramstage_cache *ramstage_cache_location(long *size)
 {
diff --git a/src/soc/intel/baytrail/tsc_freq.c b/src/soc/intel/baytrail/tsc_freq.c
index 73194fb017..c506818d00 100644
--- a/src/soc/intel/baytrail/tsc_freq.c
+++ b/src/soc/intel/baytrail/tsc_freq.c
@@ -20,11 +20,11 @@
 #include <stdint.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/tsc.h>
-#include <baytrail/msr.h>
+#include <soc/msr.h>
 #if !defined(__PRE_RAM__)
-#include <baytrail/ramstage.h>
+#include <soc/ramstage.h>
 #else
-#include <baytrail/romstage.h>
+#include <soc/romstage.h>
 #endif
 
 unsigned bus_freq_khz(void)
diff --git a/src/soc/intel/baytrail/xhci.c b/src/soc/intel/baytrail/xhci.c
index 401e1e7fe2..f48c1995f4 100644
--- a/src/soc/intel/baytrail/xhci.c
+++ b/src/soc/intel/baytrail/xhci.c
@@ -25,14 +25,14 @@
 #include <stdint.h>
 #include <reg_script.h>
 
-#include <baytrail/iomap.h>
-#include <baytrail/iosf.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pattrs.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/ramstage.h>
-#include <baytrail/xhci.h>
+#include <soc/iomap.h>
+#include <soc/iosf.h>
+#include <soc/lpc.h>
+#include <soc/pattrs.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/ramstage.h>
+#include <soc/xhci.h>
 
 #include "chip.h"