mb/google/fatcat: Remove chromeos-debug-fsp.fmd

The file chromeos-debug-fsp.fmd is no longer needed, as the FMD
configuration is now handled by the generic Chrome OS FMD file.

This change removes the file to simplify the build process and
reduce the amount of code that needs to be maintained.

Change-Id: Ida430d415ae3f7dc93b89eb4d7c7ba59ed280e1b
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85971
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2025-01-14 14:02:45 +05:30
commit 11eeeb5e2a
2 changed files with 0 additions and 53 deletions

View file

@ -118,10 +118,6 @@ config DRIVER_TPM_I2C_BUS
default 0x03 if BOARD_GOOGLE_MODEL_FATCAT
default 0x01 if BOARD_GOOGLE_FRANCKA
config FMDFILE
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos-debug-fsp.fmd" if CHROMEOS && BUILDING_WITH_DEBUG_FSP
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
config HAVE_SLP_S0_GATE
def_bool n

View file

@ -1,49 +0,0 @@
FLASH 32M {
SI_ALL 8M {
SI_DESC 16K
SI_ME
}
SI_BIOS 24M {
RW_SECTION_A 7680K {
VBLOCK_A 8K
FW_MAIN_A(CBFS)
RW_FWID_A 64
}
RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K {
RECOVERY_MRC_CACHE 64K
RW_MRC_CACHE 64K
}
RW_ELOG(PRESERVE) 16K
RW_SHARED 16K {
SHARED_DATA 8K
VBLOCK_DEV 8K
}
RW_VPD(PRESERVE) 8K
RW_NVRAM(PRESERVE) 24K
}
# This section starts at the 16M boundary in SPI flash.
# PTL does not support a region crossing this boundary,
# because the SPI flash is memory-mapped into two non-
# contiguous windows.
RW_SECTION_B 7680K {
VBLOCK_B 8K
FW_MAIN_B(CBFS)
RW_FWID_B 64
}
RW_LEGACY(CBFS) 1M
RW_UNUSED 3M
# Make WP_RO region align with SPI vendor
# memory protected range specification.
WP_RO 4M {
RO_VPD(PRESERVE) 16K
RO_GSCVD 8K
RO_SECTION {
FMAP 2K
RO_FRID 64
GBB@4K 12K
COREBOOT(CBFS)
}
}
}
}