diff --git a/src/soc/intel/meteorlake/include/soc/usb.h b/src/soc/intel/common/block/include/intelblocks/usb.h
similarity index 97%
rename from src/soc/intel/meteorlake/include/soc/usb.h
rename to src/soc/intel/common/block/include/intelblocks/usb.h
index 70a367ec59..44094d29fe 100644
--- a/src/soc/intel/meteorlake/include/soc/usb.h
+++ b/src/soc/intel/common/block/include/intelblocks/usb.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#ifndef _SOC_USB_H_
-#define _SOC_USB_H_
+#ifndef SOC_INTEL_COMMON_BLOCK_USB_H
+#define SOC_INTEL_COMMON_BLOCK_USB_H
 
 #include <stdint.h>
 
@@ -152,5 +152,4 @@ struct tcss_port_config {
 	.ocpin            = (pin), \
 }
 
-
 #endif
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index 88aaaf6435..7c4c954d26 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -12,11 +12,11 @@
 #include <intelblocks/power_limit.h>
 #include <intelblocks/pcie_rp.h>
 #include <intelblocks/tcss.h>
+#include <intelblocks/usb.h>
 #include <soc/gpe.h>
 #include <soc/pci_devs.h>
 #include <soc/pmc.h>
 #include <soc/serialio.h>
-#include <soc/usb.h>
 #include <stdbool.h>
 #include <stdint.h>
 
diff --git a/src/soc/intel/pantherlake/chip.h b/src/soc/intel/pantherlake/chip.h
index b1bd1a50a7..601c026c6f 100644
--- a/src/soc/intel/pantherlake/chip.h
+++ b/src/soc/intel/pantherlake/chip.h
@@ -12,12 +12,12 @@
 #include <intelblocks/power_limit.h>
 #include <intelblocks/pcie_rp.h>
 #include <intelblocks/tcss.h>
+#include <intelblocks/usb.h>
 #include <soc/gpe.h>
 #include <soc/pci_devs.h>
 #include <soc/pmc.h>
 #include <soc/serialio.h>
 #include <soc/tcss.h>
-#include <soc/usb.h>
 #include <stdint.h>
 
 /* Define config parameters for In-Band ECC (IBECC). */
diff --git a/src/soc/intel/pantherlake/include/soc/usb.h b/src/soc/intel/pantherlake/include/soc/usb.h
deleted file mode 100644
index 1e68d8d73f..0000000000
--- a/src/soc/intel/pantherlake/include/soc/usb.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef _SOC_PANTHERLAKE_USB_H_
-#define _SOC_PANTHERLAKE_USB_H_
-
-#include <stdint.h>
-
-/* Per Port HS Transmitter Emphasis */
-#define USB2_EMP_OFF			0
-#define USB2_DE_EMP_ON			1
-#define USB2_PRE_EMP_ON			2
-#define USB2_DE_EMP_ON_PRE_EMP_ON	3
-
-/* Per Port Half Bit Pre-emphasis */
-#define USB2_FULL_BIT_PRE_EMP	0
-#define USB2_HALF_BIT_PRE_EMP	1
-
-/* Per Port HS Preemphasis Bias */
-#define USB2_BIAS_0MV		0
-#define USB2_BIAS_11P25MV	1
-#define USB2_BIAS_16P9MV	2
-#define USB2_BIAS_28P15MV	3
-#define USB2_BIAS_39P35MV	5
-#define USB2_BIAS_45MV		6
-#define USB2_BIAS_56P3MV	7
-
-struct usb2_port_config {
-	uint8_t enable;
-	uint8_t ocpin;
-	uint8_t tx_bias;
-	uint8_t tx_emp_enable;
-	uint8_t pre_emp_bias;
-	uint8_t pre_emp_bit;
-	uint8_t type_c;
-};
-
-/* USB Overcurrent pins definition */
-enum {
-	OC0 = 0,
-	OC1,
-	OC2,
-	OC3,
-	OC4,
-	OC5,
-	OC6,
-	OC7,
-	OCMAX,
-	OC_SKIP = 0xff, /* Skip OC programming */
-};
-
-/* Standard USB Port based on length:
- * - External
- * - Back Panel
- * - OTG
- * - M.2
- * - Internal device down */
-
-#define USB2_PORT_EMPTY { \
-	.enable        = 0, \
-	.ocpin         = OC_SKIP, \
-	.tx_bias       = USB2_BIAS_0MV, \
-	.tx_emp_enable = USB2_EMP_OFF, \
-	.pre_emp_bias  = USB2_BIAS_0MV, \
-	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
-}
-
-/* Length = 11.5"-12" */
-#define USB2_PORT_LONG(pin) { \
-	.enable        = 1, \
-	.ocpin         = (pin), \
-	.tx_bias       = USB2_BIAS_39P35MV, \
-	.tx_emp_enable = USB2_PRE_EMP_ON, \
-	.pre_emp_bias  = USB2_BIAS_56P3MV, \
-	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
-}
-
-/* Length  = 6"-11.49" */
-#define USB2_PORT_MID(pin) { \
-	.enable        = 1, \
-	.ocpin         = (pin), \
-	.tx_bias       = USB2_BIAS_0MV, \
-	.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON, \
-	.pre_emp_bias  = USB2_BIAS_45MV, \
-	.pre_emp_bit   = USB2_FULL_BIT_PRE_EMP, \
-}
-
-/* Length = 3"-5.99" */
-#define USB2_PORT_SHORT(pin) { \
-	.enable        = 1, \
-	.ocpin         = (pin), \
-	.tx_bias       = USB2_BIAS_39P35MV, \
-	.tx_emp_enable = USB2_PRE_EMP_ON | USB2_DE_EMP_ON, \
-	.pre_emp_bias  = USB2_BIAS_39P35MV, \
-	.pre_emp_bit   = USB2_FULL_BIT_PRE_EMP, \
-}
-
-/* Max TX and Pre-emp settings */
-#define USB2_PORT_MAX(pin) { \
-	.enable        = 1, \
-	.ocpin         = (pin), \
-	.tx_bias       = USB2_BIAS_56P3MV, \
-	.tx_emp_enable = USB2_PRE_EMP_ON, \
-	.pre_emp_bias  = USB2_BIAS_56P3MV, \
-	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
-}
-
-/* Type-C Port, no BC1.2 charge detect module / MUX
- * Length  = 3.0" - 9.00" */
-#define USB2_PORT_TYPE_C(pin) { \
-	.enable        = 1, \
-	.ocpin         = (pin), \
-	.tx_bias       = USB2_BIAS_0MV, \
-	.tx_emp_enable = USB2_PRE_EMP_ON, \
-	.pre_emp_bias  = USB2_BIAS_56P3MV, \
-	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
-	.type_c	       = 1, \
-}
-
-struct usb3_port_config {
-	uint8_t enable;
-	uint8_t ocpin;
-	uint8_t tx_de_emp;
-	uint8_t tx_downscale_amp;
-};
-
-#define USB3_PORT_EMPTY { \
-	.enable           = 0, \
-	.ocpin            = OC_SKIP, \
-	.tx_de_emp        = 0x00, \
-	.tx_downscale_amp = 0x00, \
-}
-
-#define USB3_PORT_DEFAULT(pin) { \
-	.enable           = 1, \
-	.ocpin            = (pin), \
-	.tx_de_emp        = 0x0, \
-	.tx_downscale_amp = 0x00, \
-}
-
-struct tcss_port_config {
-	uint8_t enable;
-	uint8_t ocpin;
-};
-
-#define TCSS_PORT_EMPTY { \
-	.enable           = 0, \
-	.ocpin            = OC_SKIP, \
-}
-
-#define TCSS_PORT_DEFAULT(pin) { \
-	.enable           = 1, \
-	.ocpin            = (pin), \
-}
-
-#endif /* _SOC_PANTHERLAKE_USB_H_ */