From 10cf6658f79ca3d95a533ede0009b45bc5d32f40 Mon Sep 17 00:00:00 2001
From: Sean Rhodes <sean@starlabs.systems>
Date: Wed, 29 Jan 2025 12:27:46 +0000
Subject: [PATCH] mb/starlabs/*: Explicitly set Early Command Training

Explicitly set ECT in romstage; enable it for boards that use
LPxxx memory and disable it for boards that use SODIMMs.

Change-Id: I41bd9b221dc97bb4f76862f7095c20f4b8bc6036
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86207
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
---
 src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c | 1 +
 src/mainboard/starlabs/starbook/variants/adl/romstage.c   | 1 +
 src/mainboard/starlabs/starbook/variants/adl_n/romstage.c | 1 +
 src/mainboard/starlabs/starbook/variants/cml/romstage.c   | 2 +-
 src/mainboard/starlabs/starbook/variants/mtl/romstage.c   | 1 +
 src/mainboard/starlabs/starbook/variants/rpl/romstage.c   | 1 +
 src/mainboard/starlabs/starbook/variants/tgl/romstage.c   | 1 +
 7 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c b/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c
index 530246aeea..5f8ebd602f 100644
--- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c
+++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c
@@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg mem_config = {
 		.type = MEM_TYPE_DDR4,
+		.ect = false,
 		.UserBd = BOARD_TYPE_ULT_ULX,
 	};
 
diff --git a/src/mainboard/starlabs/starbook/variants/adl/romstage.c b/src/mainboard/starlabs/starbook/variants/adl/romstage.c
index d31c63e9d0..98683da2df 100644
--- a/src/mainboard/starlabs/starbook/variants/adl/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/adl/romstage.c
@@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg mem_config = {
 		.type = MEM_TYPE_DDR4,
+		.ect = false,
 		.UserBd = BOARD_TYPE_MOBILE,
 	};
 
diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c b/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c
index 2f1d1a2b87..21000d1d33 100644
--- a/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c
@@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg mem_config = {
 		.type = MEM_TYPE_DDR4,
+		.ect = false,
 		.UserBd = BOARD_TYPE_ULT_ULX,
 	};
 
diff --git a/src/mainboard/starlabs/starbook/variants/cml/romstage.c b/src/mainboard/starlabs/starbook/variants/cml/romstage.c
index 372f8b0620..648943ba46 100644
--- a/src/mainboard/starlabs/starbook/variants/cml/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/cml/romstage.c
@@ -66,7 +66,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
 		.rcomp_targets = {100, 40, 20, 20, 26},
 		.dq_pins_interleaved = 0,
 		.vref_ca_config = 2,
-		.ect = 0,
+		.ect = true,
 	};
 
 	const uint8_t vtd = get_uint_option("vtd", 1);
diff --git a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c
index 64b78846d0..318186539d 100644
--- a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c
@@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg mem_config = {
 		.type = MEM_TYPE_DDR5,
+		.ect = false,
 		.UserBd = BOARD_TYPE_MOBILE,
 	};
 
diff --git a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c
index a4261e7799..20d518c5c3 100644
--- a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c
@@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg mem_config = {
 		.type = MEM_TYPE_DDR4,
+		.ect = false,
 		.UserBd = BOARD_TYPE_MOBILE,
 	};
 
diff --git a/src/mainboard/starlabs/starbook/variants/tgl/romstage.c b/src/mainboard/starlabs/starbook/variants/tgl/romstage.c
index ceeb754813..8eb82a5a14 100644
--- a/src/mainboard/starlabs/starbook/variants/tgl/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/tgl/romstage.c
@@ -9,6 +9,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg mem_config = {
 		.type = MEM_TYPE_DDR4,
+		.ect = false,
 	};
 
 	const bool half_populated = false;