From 1013d9cb9a031dd40b39853a5272fc8d9bc1f7d6 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Mon, 24 Apr 2017 15:06:09 +0200 Subject: [PATCH] UPSTREAM: inteltool: Add Skylake PCI id in memory.c BUG=none BRANCH=none TEST=none Change-Id: I0b3a475c1c875e51929e981d7a809f5e40b00e43 Signed-off-by: Patrick Georgi Original-Commit-Id: 21e7424fc985f2f92ee7e9f505acd72c53035531 Original-Change-Id: I751e887bd90a258a69d13ea4ee9a409c8c86a3c3 Original-Signed-off-by: Nico Huber Original-Reviewed-on: https://review.coreboot.org/19591 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Philippe Mathieu-Daud Original-Reviewed-by: Stefan Reinauer Reviewed-on: https://chromium-review.googlesource.com/531189 Commit-Ready: Patrick Georgi Tested-by: Patrick Georgi Reviewed-by: Patrick Georgi --- util/inteltool/memory.c | 1 + 1 file changed, 1 insertion(+) diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c index 686c1e7ae1..59329c8b22 100644 --- a/util/inteltool/memory.c +++ b/util/inteltool/memory.c @@ -218,6 +218,7 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_s case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_E3: case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: mchbar_phys = pci_read_long(nb, 0x48); mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32; mchbar_phys &= 0x0000007fffff8000UL; /* 38:15 */