From 0fc956cd2ddf97c1a4f29907fc83f3bb466b12b8 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 27 Mar 2026 11:55:34 +0000 Subject: [PATCH] mb/google/mensa: Set correct Kconfig defaults for peripherals Update the default Kconfig values for the google/mensa mainboard to specify the correct hardware instances/buses used for various peripherals as per mensa schematics (dated 03/10). Changes: - TPM I2C bus set to 0x01. - ChromeEC SPI bus set to 0x16. Removes previous TODO placeholders. BUG=b:496650089 TEST=Successfully built google/mensa. Change-Id: Ic377be3dc165bf1c1e19031994d87ea45d6c2dc0 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/91902 Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal --- src/mainboard/google/mensa/Kconfig | 6 +++--- src/mainboard/google/mensa/board.h | 5 +++-- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/src/mainboard/google/mensa/Kconfig b/src/mainboard/google/mensa/Kconfig index e93de807bf..5948aed0ad 100644 --- a/src/mainboard/google/mensa/Kconfig +++ b/src/mainboard/google/mensa/Kconfig @@ -71,7 +71,7 @@ config MAINBOARD_PART_NUMBER config DRIVER_TPM_I2C_BUS depends on I2C_TPM hex - default 0x0 # TODO + default 0x01 # QUP0_SE1 config DRIVER_TPM_I2C_ADDR default 0x50 @@ -79,12 +79,12 @@ config DRIVER_TPM_I2C_ADDR config EC_GOOGLE_CHROMEEC_SPI_BUS depends on EC_GOOGLE_CHROMEEC hex - default 0x0 # TODO + default 0x16 # QUP2_SE6 config MAINBOARD_GPIO_PIN_FOR_GSC_AP_INTERRUPT depends on TPM_GOOGLE_TI50 int - default 0 # TODO + default 23 help This option specifies the GPIO pin number on the mainboard that is used for the interrupt line from the Google Security Chip (GSC) to the diff --git a/src/mainboard/google/mensa/board.h b/src/mainboard/google/mensa/board.h index 973c375d97..72fc39fadf 100644 --- a/src/mainboard/google/mensa/board.h +++ b/src/mainboard/google/mensa/board.h @@ -7,8 +7,9 @@ #include /* TODO: update as per datasheet */ -#define GPIO_AP_EC_INT GPIO(0) -#define GPIO_GSC_AP_INT GPIO(0) +#define GPIO_AP_EC_INT GPIO(66) +#define GSC_AP_INT(x) GPIO(x) +#define GPIO_GSC_AP_INT GSC_AP_INT(CONFIG_MAINBOARD_GPIO_PIN_FOR_GSC_AP_INTERRUPT) void setup_chromeos_gpios(void);