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mb/google/brox: Switch USB-C port locations

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The ordering of the USB-C port locations is swapped. When facing the
left panel, the correct ordering is port 1 (left) then port 0 (right).
Swap the positions of the two USB-C ports to their correct values.

BUG=b:349822718
TEST=Booted to OS, confirmed correct physical_location at
/sys/class/typec.

Change-Id: I98e3042c64aba885b602c99916734c2dbb9d66bd
Signed-off-by: Jameson Thies <jthies@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84403
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jameson Thies 2024-09-17 20:15:49 +00:00 • committed by Felix Held
commit 0f9de13d3a
1 changed files with 6 additions and 6 deletions
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12
src/mainboard/google/brox/variants/brox/overridetree.cb
View file

@ -148,13 +148,13 @@ chip soc/intel/alderlake
# TCP0 (DP-1) for port C0
register "device[2].name" = ""DD02""
register "device[2].use_pld" = "true"
register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
# TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1
register "device[3].name" = ""DD03""
# TCP2 (DP-3) for port C2
register "device[4].name" = ""DD04""
register "device[4].use_pld" = "true"
register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
# TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
register "device[5].name" = ""DD05""
device generic 0 on end
@ -188,14 +188,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@ -208,14 +208,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi