From 0e775bc390fc4dd7499ba885e0fe609587c62646 Mon Sep 17 00:00:00 2001
From: Brandon Weeks <bweeks@google.com>
Date: Mon, 3 Feb 2025 16:28:28 -0800
Subject: [PATCH] mb/cwwk/adl: Fix HDMI, PCIe CLKREQ, EC, TPM

- Update VBT to fix HDMI
- Enable ITE environment controller
- Enable PTT fTPM
- Disable s0ix, it never worked and will crash if used
- Set CLKREQ# based on register values from vendor firmware
- Set pmc_gpe0_dw{0-3} to fix "Duplicate GPE DW register values"

Change-Id: I9365e76c593b7e4a334dcdc5ecd46da253e14716
Signed-off-by: Brandon Weeks <bweeks@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86260
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/mainboard/cwwk/adl/Kconfig       |   2 +
 src/mainboard/cwwk/adl/data.vbt      | Bin 8704 -> 9216 bytes
 src/mainboard/cwwk/adl/devicetree.cb |  61 ++++++++++++++++++---------
 3 files changed, 42 insertions(+), 21 deletions(-)

diff --git a/src/mainboard/cwwk/adl/Kconfig b/src/mainboard/cwwk/adl/Kconfig
index 7f6c33a2b1..c8dbd04dd7 100644
--- a/src/mainboard/cwwk/adl/Kconfig
+++ b/src/mainboard/cwwk/adl/Kconfig
@@ -5,10 +5,12 @@ if BOARD_CWWK_ADL_N
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select BOARD_ROMSIZE_KB_16384
+	select CRB_TPM
 	select DRIVERS_UART_8250IO
 	select FSP_TYPE_IOT
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
+	select HAVE_INTEL_PTT
 	select INTEL_GMA_HAVE_VBT
 	select SOC_INTEL_ALDERLAKE_PCH_N
 	select SUPERIO_ITE_IT8613E
diff --git a/src/mainboard/cwwk/adl/data.vbt b/src/mainboard/cwwk/adl/data.vbt
index 2a6c2076e34473c2213b05d306a53e4ea09f2c02..b97ff679580afd4e6b8b3d870e8b27752b0a0a37 100644
GIT binary patch
delta 461
zcmZXPy-Nc@5XEQrK8)Mk8I7b-5}QjUDaFPJ3c)6Sfe=NB*qAmTcwi+ccnmSE)*>2?
z*yaQgKd@2k6zs%GQwyi>&VwKh{C4*Z@6E98oLk<{8u^J6DsoQ_dqvwIF-o7_{D)Fx
z1tbW?)1o}k6jCQD@Q!dq$Y;V)p-xw8WZN{$uVQSA!V*1Hp{t8|JBmeNi7UV>7Z1{)
zh{9ZSBG*WK77<3nSO4par@+@td_zP=>~j+z1S*V{kPc&;H)VDzQs~AT(Y#O6zwQ59
z;y=Ro&bM+LUt2N@Y-ySGj3_0M{`I6?_eJtrH56@t2G|CBpaqV=G3bCUxB-vg1-yYC
z_yU6~e5h5ptEE%lD0N4Qg&y#XuJ}T~l#?2J#sQxi%6H6N>9<oIQ!I1Ms&L&L@z1S=
Jv|lry#ScIhR6YOz

delta 405
zcmY+8F-XHe6o%isOHNzRM2pg;B?TdiLly-=C4+_Hpp&>sg(9MpgE-n%w9xuyXVF2C
z;N%jJs)Hap2)a5;X9vMQNeBDG_wL@${~y<^HJ92&`?pf1Kv)+#fouQJBt3VkJ!8m;
ziDi*%L&vNvB41kU%PsqXMGxELx?ZW`Qlfl1DW;G;&hD5xq_;X^G$*5~IGg!ia==^b
zS4WV86H@(uRi*DDwkI2?CJ7>y40x@6wLoOx#MJIrvsn58#4hAYm2;G=*t+tr%CcpA
zDd~xwF%Dr5>QO%p8ratDJZ*wqun!Kw5fE?&&cO}116}X}KEN0F2DygBdO@!BlywP3
hY@M>2*79mMq-W1ZGv-7^_rsCl6*+KLqfcjf{0~<IK$QRh

diff --git a/src/mainboard/cwwk/adl/devicetree.cb b/src/mainboard/cwwk/adl/devicetree.cb
index 72a1a980df..0502434683 100644
--- a/src/mainboard/cwwk/adl/devicetree.cb
+++ b/src/mainboard/cwwk/adl/devicetree.cb
@@ -1,6 +1,8 @@
 chip soc/intel/alderlake
 
-	register "s0ix_enable" = "true"
+	register "pmc_gpe0_dw0" = "GPP_B"
+	register "pmc_gpe0_dw1" = "GPP_D"
+	register "pmc_gpe0_dw2" = "GPP_E"
 
 	register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)"
 	register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)"
@@ -14,45 +16,49 @@ chip soc/intel/alderlake
 	register "pch_pcie_rp[PCH_RP(1)]" = "{
 		.clk_src = 0,
 		.clk_req = 0,
-		.flags = PCIE_RP_LTR | PCIE_RP_AER,
+		.flags = PCIE_RP_AER | PCIE_RP_CLK_REQ_DETECT,
 	}"
 
 	register "pch_pcie_rp[PCH_RP(7)]" = "{
 		.clk_src = 1,
-		.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_REQ_UNUSED | PCIE_RP_BUILT_IN,
-		.pcie_rp_aspm = ASPM_DISABLE,
+		.clk_req = 1,
+		.flags = PCIE_RP_AER | PCIE_RP_CLK_REQ_DETECT | PCIE_RP_BUILT_IN,
+		.pcie_rp_aspm = ASPM_L0S,
 	}"
 
 	register "pch_pcie_rp[PCH_RP(9)]" = "{
 		.clk_src = 2,
-		.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_REQ_UNUSED | PCIE_RP_BUILT_IN,
-		.pcie_rp_aspm = ASPM_DISABLE,
+		.clk_req = 2,
+		.flags = PCIE_RP_AER | PCIE_RP_CLK_REQ_DETECT | PCIE_RP_BUILT_IN,
+		.pcie_rp_aspm = ASPM_L0S,
 	}"
 
 	register "pch_pcie_rp[PCH_RP(10)]" = "{
 		.clk_src = 3,
-		.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_REQ_UNUSED | PCIE_RP_BUILT_IN,
-		.pcie_rp_aspm = ASPM_DISABLE,
+		.clk_req = 3,
+		.flags = PCIE_RP_AER | PCIE_RP_CLK_REQ_DETECT | PCIE_RP_BUILT_IN,
+		.pcie_rp_aspm = ASPM_L0S,
 	}"
 
 	register "pch_pcie_rp[PCH_RP(11)]" = "{
 		.clk_src = 4,
-		.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_REQ_UNUSED | PCIE_RP_BUILT_IN,
-		.pcie_rp_aspm = ASPM_DISABLE,
+		.flags = PCIE_RP_AER | PCIE_RP_CLK_REQ_UNUSED | PCIE_RP_BUILT_IN,
+		.pcie_rp_aspm = ASPM_L0S,
 	}"
 
 	register "pch_pcie_rp[PCH_RP(12)]" = "{
 		.clk_src = 4,
-		.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_REQ_UNUSED,
-		.pcie_rp_aspm = ASPM_DISABLE,
+		.flags = PCIE_RP_AER | PCIE_RP_CLK_REQ_UNUSED | PCIE_RP_BUILT_IN,
+		.pcie_rp_aspm = ASPM_L0S,
 	}"
 
-	# Enable EDP in PortA
-	register "ddi_portA_config" = "1"
+	register "ddi_ports_config" = "{
+		[DDI_PORT_A] = DDI_ENABLE_HPD,
+		[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
+	}"
 
 	device domain 0 on
 		device ref igpu on end
-		device ref dtt on end
 		device ref crashlog off end
 		device ref xhci on end
 		device ref shared_sram on end
@@ -63,21 +69,34 @@ chip soc/intel/alderlake
 		device ref pcie_rp11 on end
 		device ref pcie_rp12 on end # M.2 E key port
 		device ref pch_espi on
+			register "gen1_dec" = "0x00fc0201"
+			register "gen2_dec" = "0x003c0a01"
+			register "gen3_dec" = "0x000c0081"
 			chip superio/ite/it8613e
+				register "FAN2.mode"   = "FAN_SMART_SOFTWARE" # CPU_FAN
+				register "FAN3.mode"   = "FAN_SMART_SOFTWARE" # SYS_FAN
 				device pnp 2e.0 off end
-				device pnp 2e.1 on      # COM 1
+				device pnp 2e.1 on       # COM 1
 					io 0x60 = 0x3f8
 					irq 0x70 = 0x4
 					irq 0xf0 = 0x1
 				end
-				device pnp 2e.4 off end # Environment Controller
-				device pnp 2e.5 off end # Keyboard
-				device pnp 2e.6 off end # Mouse
-				device pnp 2e.7 off end # GPIO
-				device pnp 2e.a off end # CIR
+				device pnp 2e.4 on       # Environment Controller
+                                        io 0x60 = 0x0a30
+                                        io 0x62 = 0x0a20
+                                        irq 0x70 = 0x00
+                                        irq 0x71 = 0x80
+				end
+				device pnp 2e.5 off end  # Keyboard
+				device pnp 2e.6 off end  # Mouse
+				device pnp 2e.7 off end  # GPIO
+				device pnp 2e.a off end  # CIR
 			end
 		end
 		device ref hda on end
 		device ref smbus on end
+		chip drivers/crb
+			device mmio 0xfed40000 on end
+		end
 	end
 end