From 0e5d1d29bde9b401b5035a66310a4854b85587da Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sat, 21 Jun 2025 08:53:17 -0600
Subject: [PATCH] soc/intel/skylake: Expand USB OC pins enum to OC7
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Currently, the overcurrent pin enum is only defined up to OC5. However,
PCH-H chips support up to OC7 according to the 100 and 200 Series PCH
datasheets [1][2].

[1] Intel document 332690
[2] Intel document 335192

Change-Id: Ie35612eeaed2196caccc514429c7d80f84cf09a8
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88159
Reviewed-by: Michał Kopeć <michal.kopec@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/skylake/include/soc/usb.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/soc/intel/skylake/include/soc/usb.h b/src/soc/intel/skylake/include/soc/usb.h
index 612ad5fa2e..de288e774e 100644
--- a/src/soc/intel/skylake/include/soc/usb.h
+++ b/src/soc/intel/skylake/include/soc/usb.h
@@ -38,6 +38,8 @@ enum {
 	OC3,
 	OC4,
 	OC5,
+	OC6,
+	OC7,
 	OC_SKIP = 8, /* Skip OC programming */
 };