From 0d827a58103f6a1237fadd45c9ead8df9ba27dcf Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 14 Nov 2024 14:31:29 +0100 Subject: [PATCH] soc/intel/xeon_sp: Drop SOC_INTEL_MMAPVTD_ONLY_FOR_DPR On 1st and 2nd gen Xeon-SP the VTD PCI device has different PCI IDs, depending if it's on the CSTACK or PSTACK. Make sure to handle all VTD device on all stacks the same. For later SoCs this was already the case since the PCI devices have the same PCI ID. Change-Id: I0d726b5ae620282dd4c9036d536e5e51d19a0a0b Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/85139 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Shuo Liu --- src/soc/intel/xeon_sp/gnr/Kconfig | 3 --- src/soc/intel/xeon_sp/spr/Kconfig | 3 --- src/soc/intel/xeon_sp/uncore.c | 27 +++------------------ src/soc/intel/xeon_sp/uncore_acpi.c | 37 ++++++++++++++++++++++++----- 4 files changed, 34 insertions(+), 36 deletions(-) diff --git a/src/soc/intel/xeon_sp/gnr/Kconfig b/src/soc/intel/xeon_sp/gnr/Kconfig index bc703b77d3..4dee9616fe 100644 --- a/src/soc/intel/xeon_sp/gnr/Kconfig +++ b/src/soc/intel/xeon_sp/gnr/Kconfig @@ -105,9 +105,6 @@ config MAX_ACPI_TABLE_SIZE_KB config SOC_INTEL_HAS_NCMEM def_bool y -config SOC_INTEL_MMAPVTD_ONLY_FOR_DPR - def_bool y - config SOC_INTEL_HAS_CXL def_bool n diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig index 6fad812941..d6c9832f52 100644 --- a/src/soc/intel/xeon_sp/spr/Kconfig +++ b/src/soc/intel/xeon_sp/spr/Kconfig @@ -107,9 +107,6 @@ config SOC_INTEL_HAS_BIOS_DONE_MSR config SOC_INTEL_HAS_NCMEM def_bool y -config SOC_INTEL_MMAPVTD_ONLY_FOR_DPR - def_bool y - config CPU_BCLK_MHZ int default 100 diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c index 93677b9c9c..85e45db63d 100644 --- a/src/soc/intel/xeon_sp/uncore.c +++ b/src/soc/intel/xeon_sp/uncore.c @@ -56,7 +56,8 @@ enum { size_t vtd_probe_bar_size(struct device *dev) { uint32_t id = pci_read_config32(dev, PCI_VENDOR_ID); - assert(id == (PCI_VID_INTEL | (MMAP_VTD_CFG_REG_DEVID << 16))); + assert((id == (PCI_VID_INTEL | (MMAP_VTD_CFG_REG_DEVID << 16))) || + (id == (PCI_VID_INTEL | (MMAP_VTD_STACK_CFG_REG_DEVID << 16)))); uint32_t val = pci_read_config32(dev, VTD_BAR_CSR); pci_write_config32(dev, VTD_BAR_CSR, (uint32_t)(-4 * KiB)); @@ -432,6 +433,7 @@ static struct device_operations mmapvtd_ops = { static const unsigned short mmapvtd_ids[] = { MMAP_VTD_CFG_REG_DEVID, /* Memory Map/Intel® VT-d Configuration Registers */ + MMAP_VTD_STACK_CFG_REG_DEVID, 0 }; @@ -441,29 +443,6 @@ static const struct pci_driver mmapvtd_driver __pci_driver = { .devices = mmapvtd_ids }; -#if !CONFIG(SOC_INTEL_MMAPVTD_ONLY_FOR_DPR) -static void vtd_read_resources(struct device *dev) -{ - pci_dev_read_resources(dev); - - configure_dpr(dev); -} - -static struct device_operations vtd_ops = { - .read_resources = vtd_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .ops_pci = &soc_pci_ops, -}; - -/* VTD devices on other stacks */ -static const struct pci_driver vtd_driver __pci_driver = { - .ops = &vtd_ops, - .vendor = PCI_VID_INTEL, - .device = MMAP_VTD_STACK_CFG_REG_DEVID, -}; -#endif - static void dmi3_init(struct device *dev) { if (CONFIG(INTEL_TXT) && skip_intel_txt_lockdown()) diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c index b64271ee0b..86519448bf 100644 --- a/src/soc/intel/xeon_sp/uncore_acpi.c +++ b/src/soc/intel/xeon_sp/uncore_acpi.c @@ -365,6 +365,7 @@ static unsigned long acpi_create_drhd(unsigned long current, struct device *iomm static unsigned long acpi_create_atsr(unsigned long current) { + struct device *domain = NULL; struct device *child, *dev; struct resource *resource; @@ -381,8 +382,14 @@ static unsigned long acpi_create_atsr(unsigned long current) unsigned long tmp = current; bool first = true; - dev = NULL; - while ((dev = dev_find_device(PCI_VID_INTEL, MMAP_VTD_CFG_REG_DEVID, dev))) { + /* Early Xeon-SP have different PCI IDs for the VTD device on CSTACK vs PSTACK. + * Iterate over PCI domains and then look for the VTD PCI device. */ + while ((domain = dev_find_path(domain, DEVICE_PATH_DOMAIN))) { + dev = pcidev_path_behind(domain->downstream, + PCI_DEVFN(VTD_DEV_NUM, VTD_FUNC_NUM)); + assert(dev); + if (!dev) + continue; /* Only add devices for the current socket */ if (iio_pci_domain_socket_from_dev(dev) != socket) continue; @@ -429,10 +436,18 @@ static unsigned long acpi_create_rmrr(unsigned long current) static unsigned long acpi_create_rhsa(unsigned long current) { - struct device *dev = NULL; + struct device *domain = NULL; struct resource *resource; + struct device *dev; - while ((dev = dev_find_device(PCI_VID_INTEL, MMAP_VTD_CFG_REG_DEVID, dev))) { + /* Early Xeon-SP have different PCI IDs for the VTD device on CSTACK vs PSTACK. + * Iterate over PCI domains and then look for the VTD PCI device. */ + while ((domain = dev_find_path(domain, DEVICE_PATH_DOMAIN))) { + dev = pcidev_path_behind(domain->downstream, + PCI_DEVFN(VTD_DEV_NUM, VTD_FUNC_NUM)); + assert(dev); + if (!dev) + continue; /* See if there is a resource with the appropriate index. */ resource = probe_resource(dev, VTD_BAR_CSR); if (!resource) @@ -515,15 +530,25 @@ static unsigned long acpi_fill_dmar(unsigned long current) const IIO_UDS *hob = get_iio_uds(); // DRHD - iommu0 must be the last DRHD entry. - struct device *dev = NULL; + struct device *domain = NULL; struct device *iommu0 = NULL; - while ((dev = dev_find_device(PCI_VID_INTEL, MMAP_VTD_CFG_REG_DEVID, dev))) { + struct device *dev; + + /* Early Xeon-SP have different PCI IDs for the VTD device on CSTACK vs PSTACK. + * Iterate over PCI domains and then look for the VTD PCI device. */ + while ((domain = dev_find_path(domain, DEVICE_PATH_DOMAIN))) { + dev = pcidev_path_behind(domain->downstream, + PCI_DEVFN(VTD_DEV_NUM, VTD_FUNC_NUM)); + assert(dev); + if (!dev) + continue; if (is_dev_on_domain0(dev)) { iommu0 = dev; continue; } current = acpi_create_drhd(current, dev, hob); } + assert(iommu0); current = acpi_create_drhd(current, iommu0, hob);