src/include: Fix unsigned warnings
Fix warning detected by checkpatch.pl: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' BRANCH=none BUG=None TEST=Build and run on Galileo Gen2 Change-Id: I23d9b4b715aa74acc387db8fb8d3c73bd5cabfaa Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18607 Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy
parent
75d8d8da47
commit
0ca2a0654c
17 changed files with 145 additions and 133 deletions
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@ -85,7 +85,7 @@ struct bus {
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ROMSTAGE_CONST struct device * dev; /* This bridge device */
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ROMSTAGE_CONST struct device * children; /* devices behind this bridge */
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ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */
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unsigned bridge_ctrl; /* Bridge control register */
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unsigned int bridge_ctrl; /* Bridge control register */
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uint16_t bridge_cmd; /* Bridge command register */
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unsigned char link_num; /* The index of this link */
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uint16_t secondary; /* secondary bus number */
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@ -93,9 +93,9 @@ struct bus {
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unsigned char cap; /* PCi capability offset */
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uint32_t hcdn_reg; /* For HyperTransport link */
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unsigned reset_needed : 1;
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unsigned disable_relaxed_ordering : 1;
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unsigned ht_link_up : 1;
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unsigned int reset_needed : 1;
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unsigned int disable_relaxed_ordering : 1;
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unsigned int ht_link_up : 1;
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};
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/*
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@ -119,8 +119,8 @@ struct device {
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ROMSTAGE_CONST struct device * next; /* chain of all devices */
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struct device_path path;
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unsigned vendor;
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unsigned device;
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unsigned int vendor;
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unsigned int device;
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u16 subsystem_vendor;
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u16 subsystem_device;
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unsigned int class; /* 3 bytes: (base, sub, prog-if) */
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@ -201,11 +201,11 @@ device_t dev_find_path(device_t prev_match, enum device_path_type path_type);
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device_t dev_find_slot (unsigned int bus, unsigned int devfn);
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device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr);
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device_t dev_find_slot_pnp(u16 port, u16 device);
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device_t dev_find_lapic(unsigned apic_id);
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device_t dev_find_lapic(unsigned int apic_id);
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int dev_count_cpu(void);
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device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled);
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void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned core, unsigned thread);
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device_t add_cpu_device(struct bus *cpu_bus, unsigned int apic_id, int enabled);
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void set_cpu_topology(device_t cpu, unsigned int node, unsigned int package, unsigned int core, unsigned int thread);
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#define amd_cpu_topology(cpu, node, core) \
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set_cpu_topology(cpu, node, 0, core, 0)
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@ -106,35 +106,35 @@ typedef union dimm_flags_st {
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struct {
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/* Indicates if rank 1 of DIMM uses a mirrored pin mapping. See:
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* Annex K: Serial Presence Detect (SPD) for DDR3 SDRAM */
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unsigned pins_mirrored:1;
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unsigned int pins_mirrored:1;
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/* Module can work at 1.50V - All DIMMS must be 1.5V operable */
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unsigned operable_1_50V:1;
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unsigned int operable_1_50V:1;
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/* Module can work at 1.35V */
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unsigned operable_1_35V:1;
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unsigned int operable_1_35V:1;
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/* Module can work at 1.20V */
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unsigned operable_1_25V:1;
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unsigned int operable_1_25V:1;
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/* Has an 8-bit bus extension, meaning the DIMM supports ECC */
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unsigned is_ecc:1;
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unsigned int is_ecc:1;
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/* DLL-Off Mode Support */
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unsigned dll_off_mode:1;
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unsigned int dll_off_mode:1;
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/* Indicates a drive strength of RZQ/6 (40 Ohm) is supported */
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unsigned rzq6_supported:1;
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unsigned int rzq6_supported:1;
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/* Indicates a drive strength of RZQ/7 (35 Ohm) is supported */
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unsigned rzq7_supported:1;
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unsigned int rzq7_supported:1;
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/* Partial Array Self Refresh */
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unsigned pasr:1;
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unsigned int pasr:1;
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/* On-die Thermal Sensor Readout */
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unsigned odts:1;
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unsigned int odts:1;
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/* Auto Self Refresh */
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unsigned asr:1;
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unsigned int asr:1;
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/* Extended temperature range supported */
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unsigned ext_temp_range:1;
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unsigned int ext_temp_range:1;
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/* Operating at extended temperature requires 2X refresh rate */
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unsigned ext_temp_refresh:1;
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unsigned int ext_temp_refresh:1;
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/* Thermal sensor incorporated */
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unsigned therm_sensor:1;
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unsigned int therm_sensor:1;
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};
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unsigned raw;
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unsigned int raw;
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} dimm_flags_t;
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/**
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@ -40,27 +40,29 @@ struct i2c_seg
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int len;
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};
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int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int count);
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int platform_i2c_transfer(unsigned int bus, struct i2c_seg *segments,
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int count);
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#define SOFTWARE_I2C_MAX_BUS 10 /* increase as necessary */
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struct software_i2c_ops {
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void (*set_sda)(unsigned bus, int high);
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void (*set_scl)(unsigned bus, int high);
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int (*get_sda)(unsigned bus);
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int (*get_scl)(unsigned bus);
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void (*set_sda)(unsigned int bus, int high);
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void (*set_scl)(unsigned int bus, int high);
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int (*get_sda)(unsigned int bus);
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int (*get_scl)(unsigned int bus);
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};
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extern struct software_i2c_ops *software_i2c[];
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int software_i2c_transfer(unsigned bus, struct i2c_seg *segments, int count);
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void software_i2c_wedge_ack(unsigned bus, u8 chip);
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void software_i2c_wedge_read(unsigned bus, u8 chip, u8 reg, int bit_count);
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void software_i2c_wedge_write(unsigned bus, u8 chip, u8 reg, int bit_count);
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int software_i2c_transfer(unsigned int bus, struct i2c_seg *segments,
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int count);
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void software_i2c_wedge_ack(unsigned int bus, u8 chip);
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void software_i2c_wedge_read(unsigned int bus, u8 chip, u8 reg, int bit_count);
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void software_i2c_wedge_write(unsigned int bus, u8 chip, u8 reg, int bit_count);
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int i2c_read_field(unsigned bus, uint8_t chip, uint8_t reg, uint8_t *data,
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int i2c_read_field(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t *data,
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uint8_t mask, uint8_t shift);
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int i2c_write_field(unsigned bus, uint8_t chip, uint8_t reg, uint8_t data,
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int i2c_write_field(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t data,
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uint8_t mask, uint8_t shift);
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/*
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@ -69,7 +71,7 @@ int i2c_write_field(unsigned bus, uint8_t chip, uint8_t reg, uint8_t data,
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* Need this ugly stub to arbitrate since I2C device drivers hardcode
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* 'i2c_transfer()' as their entry point.
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*/
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static inline int i2c_transfer(unsigned bus, struct i2c_seg *segments,
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static inline int i2c_transfer(unsigned int bus, struct i2c_seg *segments,
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int count)
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{
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if (CONFIG_SOFTWARE_I2C)
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@ -84,7 +86,7 @@ static inline int i2c_transfer(unsigned bus, struct i2c_seg *segments,
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*
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* [start][slave addr][r][data][stop]
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*/
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static inline int i2c_read_raw(unsigned bus, uint8_t chip, uint8_t *data,
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static inline int i2c_read_raw(unsigned int bus, uint8_t chip, uint8_t *data,
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int len)
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{
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struct i2c_seg seg =
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@ -97,7 +99,7 @@ static inline int i2c_read_raw(unsigned bus, uint8_t chip, uint8_t *data,
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*
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* [start][slave addr][w][data][stop]
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*/
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static inline int i2c_write_raw(unsigned bus, uint8_t chip, uint8_t *data,
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static inline int i2c_write_raw(unsigned int bus, uint8_t chip, uint8_t *data,
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int len)
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{
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struct i2c_seg seg =
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@ -110,7 +112,7 @@ static inline int i2c_write_raw(unsigned bus, uint8_t chip, uint8_t *data,
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*
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* [start][slave addr][w][register addr][start][slave addr][r][data...][stop]
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*/
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static inline int i2c_read_bytes(unsigned bus, uint8_t chip, uint8_t reg,
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static inline int i2c_read_bytes(unsigned int bus, uint8_t chip, uint8_t reg,
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uint8_t *data, int len)
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{
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struct i2c_seg seg[2];
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@ -132,7 +134,7 @@ static inline int i2c_read_bytes(unsigned bus, uint8_t chip, uint8_t reg,
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*
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* [start][slave addr][w][register addr][start][slave addr][r][data][stop]
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*/
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static inline int i2c_readb(unsigned bus, uint8_t chip, uint8_t reg,
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static inline int i2c_readb(unsigned int bus, uint8_t chip, uint8_t reg,
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uint8_t *data)
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{
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struct i2c_seg seg[2];
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@ -154,7 +156,7 @@ static inline int i2c_readb(unsigned bus, uint8_t chip, uint8_t reg,
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*
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* [start][slave addr][w][register addr][data][stop]
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*/
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static inline int i2c_writeb(unsigned bus, uint8_t chip, uint8_t reg,
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static inline int i2c_writeb(unsigned int bus, uint8_t chip, uint8_t reg,
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uint8_t data)
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{
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struct i2c_seg seg;
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@ -40,64 +40,64 @@ enum device_path_type {
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struct domain_path
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{
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unsigned domain;
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unsigned int domain;
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};
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struct pci_path
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{
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unsigned devfn;
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unsigned int devfn;
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};
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struct pnp_path
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{
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unsigned port;
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unsigned device;
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unsigned int port;
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unsigned int device;
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};
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struct i2c_path
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{
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unsigned device;
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unsigned mode_10bit;
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unsigned int device;
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unsigned int mode_10bit;
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};
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struct spi_path
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{
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unsigned cs;
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unsigned int cs;
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};
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struct apic_path
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{
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unsigned apic_id;
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unsigned package_id;
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unsigned node_id;
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unsigned core_id;
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unsigned thread_id;
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unsigned int apic_id;
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unsigned int package_id;
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unsigned int node_id;
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unsigned int core_id;
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unsigned int thread_id;
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};
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struct ioapic_path
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{
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unsigned ioapic_id;
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unsigned int ioapic_id;
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};
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struct cpu_cluster_path
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{
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unsigned cluster;
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unsigned int cluster;
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};
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struct cpu_path
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{
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unsigned id;
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unsigned int id;
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};
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struct cpu_bus_path
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{
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unsigned id;
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unsigned int id;
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};
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struct generic_path
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{
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unsigned id;
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unsigned subid;
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unsigned int id;
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unsigned int subid;
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};
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@ -32,7 +32,8 @@
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/* Common pci operations without a standard interface */
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struct pci_operations {
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/* set the Subsystem IDs for the PCI device */
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void (*set_subsystem)(device_t dev, unsigned vendor, unsigned device);
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void (*set_subsystem)(device_t dev, unsigned int vendor,
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unsigned int device);
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void (*set_L1_ss_latency)(device_t dev, unsigned int off);
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};
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@ -69,26 +70,28 @@ void pci_dev_set_resources(device_t dev);
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void pci_dev_enable_resources(device_t dev);
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void pci_bus_enable_resources(device_t dev);
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void pci_bus_reset(struct bus *bus);
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device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn);
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device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned int devfn);
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void do_pci_scan_bridge(device_t bus,
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void (*do_scan_bus)(struct bus *bus,
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unsigned min_devfn, unsigned max_devfn));
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unsigned int min_devfn, unsigned int max_devfn));
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void pci_scan_bridge(device_t bus);
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void pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn);
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void pci_scan_bus(struct bus *bus, unsigned int min_devfn,
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unsigned int max_devfn);
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uint8_t pci_moving_config8(struct device *dev, unsigned reg);
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uint16_t pci_moving_config16(struct device *dev, unsigned reg);
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uint32_t pci_moving_config32(struct device *dev, unsigned reg);
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uint8_t pci_moving_config8(struct device *dev, unsigned int reg);
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uint16_t pci_moving_config16(struct device *dev, unsigned int reg);
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uint32_t pci_moving_config32(struct device *dev, unsigned int reg);
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struct resource *pci_get_resource(struct device *dev, unsigned long index);
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void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device);
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void pci_dev_set_subsystem(device_t dev, unsigned int vendor,
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unsigned int device);
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void pci_dev_init(struct device *dev);
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unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev);
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const char * pin_to_str(int pin);
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int get_pci_irq_pins(device_t dev, device_t *parent_bdg);
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void pci_assign_irqs(unsigned bus, unsigned slot,
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void pci_assign_irqs(unsigned int bus, unsigned int slot,
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const unsigned char pIntAtoD[4]);
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const char *get_pci_class_name(device_t dev);
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const char *get_pci_subclass_name(device_t dev);
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@ -109,11 +112,13 @@ static inline const struct pci_operations *ops_pci(device_t dev)
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#endif /* ! __SIMPLE_DEVICE__ */
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#ifdef __SIMPLE_DEVICE__
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unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last);
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unsigned pci_find_capability(pci_devfn_t dev, unsigned cap);
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unsigned int pci_find_next_capability(pci_devfn_t dev, unsigned int cap,
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unsigned int last);
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unsigned int pci_find_capability(pci_devfn_t dev, unsigned int cap);
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#else /* !__SIMPLE_DEVICE__ */
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unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last);
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unsigned pci_find_capability(device_t dev, unsigned cap);
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unsigned int pci_find_next_capability(device_t dev, unsigned int cap,
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unsigned int last);
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unsigned int pci_find_capability(device_t dev, unsigned int cap);
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#endif /* __SIMPLE_DEVICE__ */
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void pci_early_bridge_init(void);
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@ -23,7 +23,7 @@
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#define EHCI_BAR_INDEX 0x10
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#define PCI_EHCI_CLASSCODE 0x0c0320 /* USB2.0 with EHCI controller */
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pci_devfn_t pci_ehci_dbg_dev(unsigned hcd_idx);
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pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx);
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u8 *pci_ehci_base_regs(pci_devfn_t dev);
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void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port);
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void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base);
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@ -31,7 +31,7 @@ extern struct device_operations pnp_ops;
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/* PNP helper operations */
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struct io_info {
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unsigned mask, set;
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unsigned int mask, set;
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};
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struct pnp_info {
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@ -64,7 +64,7 @@ struct pnp_info {
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#define PNP_MSCE 0x800000
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struct io_info io0, io1, io2, io3;
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};
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struct resource *pnp_get_resource(device_t dev, unsigned index);
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struct resource *pnp_get_resource(device_t dev, unsigned int index);
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void pnp_enable_devices(struct device *dev, struct device_operations *ops,
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unsigned int functions, struct pnp_info *info);
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@ -57,9 +57,9 @@ struct resource {
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struct device;
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struct bus;
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extern void compact_resources(struct device * dev);
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extern struct resource *probe_resource(struct device *dev, unsigned index);
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extern struct resource *new_resource(struct device * dev, unsigned index);
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extern struct resource *find_resource(struct device * dev, unsigned index);
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extern struct resource *probe_resource(struct device *dev, unsigned int index);
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extern struct resource *new_resource(struct device * dev, unsigned int index);
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extern struct resource *find_resource(struct device * dev, unsigned int index);
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extern resource_t resource_end(struct resource *resource);
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extern resource_t resource_max(struct resource *resource);
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extern void report_resource_stored(struct device * dev, struct resource *resource, const char *comment);
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