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mb/google/fatcat/var/lapis: Modify touchpad and touchpanel configuration

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When configuring the touch_thc_i2c controlled touchpad and touchscreen
for the first time, referring to the fatcat code. The touchpad and
touchscreen could not be successfully bringup, since the touchpad and
touchscreen configured in the code are opposite to those in the fatcat
schematic diagram. According to the circuit schematic
NB7835CAA_SCH_MB_V1_A.pdf, modify the GPIO configuration and devicetree.

1. Configure GPIO as THC-I2C function.
2. Modify devicetree
        touchpad    ==> THC0
        touchpanel  ==> THC1

BUG=b:448030832 b:445817408
TEST=emerge-fatcat coerboot chromeos-bootimage
flash to DUT, touchpad and touchpanel can be found by `getevent`

Change-Id: I6826145f58d437e03683a4459ded3b7657cf616a
Signed-off-by: Hualin Wei <weihualin@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89383
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Hualin Wei 2025-09-30 17:15:54 +08:00 • committed by Matt DeVillier
commit 0c97aed8ac
2 changed files with 22 additions and 20 deletions
Download patch file Download diff file Expand all files Collapse all files

26
src/mainboard/google/fatcat/variants/lapis/gpio.c
View file

@ -220,9 +220,9 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_E10, NONE),
/* GPP_E11: EN_TCHSCR_PWR ==> TOUCH_ENABLE */
PAD_CFG_GPO(GPP_E11, 1, PLTRST),
/* GPP_E12: SOC_I2C_TCHPAD_SCL ==> THC_I2C0_SCL_TOUCH_EDP */
/* GPP_E12: SOC_I2C_TCHPAD_SCL ==> THC_I2C1_SCL_TOUCH_EDP */
PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
/* GPP_E13: SOC_I2C_TCHPAD_SDA ==> THC_I2C0_SDA_TOUCH_EDP*/
/* GPP_E13: SOC_I2C_TCHPAD_SDA ==> THC_I2C1_SDA_TOUCH_EDP*/
PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
/* GPP_E14: Not used */
PAD_NC(GPP_E14, NONE),
@ -230,10 +230,10 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_E15, NONE),
/* GPP_E16: Not used */
PAD_NC(GPP_E16, NONE),
/* GPP_E17: Not used ==> TOUCHPAD_INTR */
PAD_CFG_GPI_APIC(GPP_E17, NONE, PLTRST, LEVEL, NONE),
/* GPP_E18: TCHPAD_INT_ODL_LS ==> Not used */
PAD_NC(GPP_E18, NONE),
/* GPP_E17: Not used */
PAD_NC(GPP_E17, NONE),
/* GPP_E18: TCHPAD_INT_ODL_LS */
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF3),
/* GPP_E20: Not used ==> PANEL_ID1 */
PAD_NC(GPP_E20, NONE),
/* GPP_E21: PMC_I2C_PD_INT_ODL ==> PD_SMB1_INT# */
@ -263,18 +263,18 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_F06, NONE),
/* GPP_F07: Not used */
PAD_NC(GPP_F07, NONE),
/* GPP_F08: Not used */
PAD_NC(GPP_F08, NONE),
/* GPP_F08: TCHSCR_PWR_EN */
PAD_CFG_GPO(GPP_F08, 1, DEEP),
/* GPP_F09: NC */
PAD_NC(GPP_F09, NONE),
/* GPP_F10: NC */
PAD_NC(GPP_F10, NONE),
/* GPP_F11: NC */
PAD_NC(GPP_F11, NONE),
/* GPP_F12: THC_I2C1_SCL_TCH_PAD */
PAD_CFG_NF(GPP_F12, NONE, DEEP, NF8),
/* GPP_F13: THC_I2C1_SDA_TCH_PAD */
PAD_CFG_NF(GPP_F13, NONE, DEEP, NF8),
/* GPP_F12: THC_I2C0_SCL_TCH_PAD */
PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1),
/* GPP_F13: THC_I2C0_SDA_TCH_PAD */
PAD_CFG_NF(GPP_F13, NONE, DEEP, NF1),
/* GPP_F14: NC */
PAD_NC(GPP_F14, NONE),
/* GPP_F15: NC */
@ -285,7 +285,7 @@ static const struct pad_config gpio_table[] = {
/* GPP_F17: CODEC_INT_N ==> NC */
PAD_NC(GPP_F17, NONE),
/* GPP_F18: SOC_TCHSCR_INT */
PAD_CFG_GPI_APIC(GPP_F18, NONE, PLTRST, LEVEL, INVERT),
PAD_CFG_NF(GPP_F18, NONE, DEEP, NF3),
/* GPP_F19: NC */
PAD_NC(GPP_F19, NONE),
/* GPP_F20: NC */

16
src/mainboard/google/fatcat/variants/lapis/overridetree.cb
View file

@ -406,11 +406,8 @@ chip soc/intel/pantherlake
chip drivers/intel/touch
register "name" = "INTEL_THC0_NAME"
register "mode" = "THC_HID_I2C_MODE"
register "dev_hidi2c.hid" = ""RAYD0001""
register "dev_hidi2c.cid" = ""PNP0C50""
register "dev_hidi2c.intf.hidi2c.addr" = "0x39"
register "dev_hidi2c.intf.hidi2c.descriptor_address" = "0x1"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E11)"
register "dev_hidi2c.intf.hidi2c.addr" = "0x15"
register "dev_hidi2c.intf.hidi2c.descriptor_address" = "0x01"
register "wake_on_touch" = "true"
# NOTE: Use GpioInt() in _CRS and does not use GPE.
register "wake_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW_WAKE(GPP_VGPIO3_THC0)"
@ -420,12 +417,17 @@ chip soc/intel/pantherlake
register "add_acpi_dma_property" = "true"
device generic 0 on end
end
end #Touchpenal
end #Touchpad
device ref thc1 on
register "thc_wake_on_touch[1]" = "true"
chip drivers/intel/touch
register "name" = "INTEL_THC1_NAME"
register "mode" = "THC_HID_I2C_MODE"
register "dev_hidi2c.hid" = ""RAYD0001""
register "dev_hidi2c.cid" = ""PNP0C50""
register "dev_hidi2c.intf.hidi2c.addr" = "0x39"
register "dev_hidi2c.intf.hidi2c.descriptor_address" = "0"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F08)"
register "wake_on_touch" = "true"
# NOTE: Use GpioInt() in _CRS and does not use GPE.
register "wake_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW_WAKE(GPP_VGPIO3_THC1)"
@ -435,7 +437,7 @@ chip soc/intel/pantherlake
register "add_acpi_dma_property" = "true"
device generic 0 on end
end
end #Touchpad
end #Touchpenal
device ref i2c0 on end
device ref i2c3 on