mb/google/brya/var/glassway: Add WFC Function

1.Add WFC fw_config setting.
2.Used USB2 Port7 for WFC.

BUG=b:365184481
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot

Change-Id: Ie5dcf5ed8f72a4bdf4c2c7fc63bf94dc7b869eef
Signed-off-by: Daniel_Peng <Daniel_Peng@pegatron.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84685
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Daniel_Peng 2024-10-07 11:50:26 +08:00 committed by Eric Lai
commit 0c0f5499b3
2 changed files with 22 additions and 2 deletions

View file

@ -21,6 +21,10 @@ fw_config
option WIFI_SAR_ID_0 0
option WIFI_SAR_ID_1 1
end
field WFC 16 17
option WFC_ABSENT 0
option WFC_PRESENT 1
end
field TOUCHSCREEN_SOURCE 32 33
option TOUCHSCREEN_UNPROVISIONED 0
option TOUCHSCREEN_ELAN0001 1
@ -88,6 +92,7 @@ chip soc/intel/alderlake
register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WFC
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
# Configure external V1P05/Vnn/VnnSx Rails
@ -541,9 +546,11 @@ chip soc/intel/alderlake
device ref usb2_port6 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Camera""
register "desc" = ""USB2 WFC""
register "type" = "UPC_TYPE_INTERNAL"
device ref usb2_port7 on end
device ref usb2_port7 on
probe WFC WFC_PRESENT
end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Bluetooth""

View file

@ -9,3 +9,16 @@ const char *get_wifi_sar_cbfs_filename(void)
{
return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_SAR_ID));
}
void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{
if (!fw_config_probe(FW_CONFIG(WFC, WFC_PRESENT))) {
printk(BIOS_INFO, "Disable usb2_port7 of WFC.\n");
config->usb2_ports[6].enable = 0;
config->usb2_ports[6].ocpin = OC_SKIP;
config->usb2_ports[6].tx_bias = USB2_BIAS_0MV;
config->usb2_ports[6].tx_emp_enable = USB2_EMP_OFF;
config->usb2_ports[6].pre_emp_bias = USB2_BIAS_0MV;
config->usb2_ports[6].pre_emp_bit = USB2_HALF_BIT_PRE_EMP;
}
}