From 0be563503ad88796aa030247392dfc4886aa6ddb Mon Sep 17 00:00:00 2001 From: Wentao Qin Date: Wed, 25 Feb 2026 21:43:38 +0800 Subject: [PATCH] mb/google/rauru: Support new bias IC TPS65130RGER MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The panel uses TPS65130RGER as the bias IC, with supply set to ±5.9V. Configure TPS65130RGER initialization and power-on sequence according to the tps65130.pdf. The tps65132s driver is no longer used on this platform and remove it from the build. [INFO ] mtk_display_init: 'BOE NS130069' 3504x2190@120Hz bpp 4 BUG=b:463911061 TEST=Check display initialization log and display are normal BRANCH=none Change-Id: Idfc19597c4357adb818ca008f93bac2e7ebe3edb Signed-off-by: Wentao Qin Reviewed-on: https://review.coreboot.org/c/coreboot/+/91424 Reviewed-by: Yidi Lin Tested-by: build bot (Jenkins) Reviewed-by: Yu-Ping Wu --- src/mainboard/google/rauru/Makefile.mk | 1 - src/mainboard/google/rauru/panel.h | 12 ------- src/mainboard/google/rauru/panel_sapphire.c | 22 ++++++++---- src/mainboard/google/rauru/panel_tps65132s.c | 38 -------------------- src/soc/mediatek/mt8196/Makefile.mk | 1 - 5 files changed, 15 insertions(+), 59 deletions(-) delete mode 100644 src/mainboard/google/rauru/panel_tps65132s.c diff --git a/src/mainboard/google/rauru/Makefile.mk b/src/mainboard/google/rauru/Makefile.mk index 0d44451727..b13c77ecf6 100644 --- a/src/mainboard/google/rauru/Makefile.mk +++ b/src/mainboard/google/rauru/Makefile.mk @@ -11,7 +11,6 @@ romstage-y += romstage.c ramstage-y += boardid.c ramstage-y += mainboard.c ramstage-y += panel.c -ramstage-y += panel_tps65132s.c ramstage-y += regulator.c ramstage-$(CONFIG_BOARD_GOOGLE_SAPPHIRE) += panel_sapphire.c diff --git a/src/mainboard/google/rauru/panel.h b/src/mainboard/google/rauru/panel.h index 954a2e8405..d44ff10774 100644 --- a/src/mainboard/google/rauru/panel.h +++ b/src/mainboard/google/rauru/panel.h @@ -3,22 +3,10 @@ #ifndef __MAINBOARD_GOOGLE_RAURU_PANEL_H__ #define __MAINBOARD_GOOGLE_RAURU_PANEL_H__ -#include #include -#include -#include - -#define PMIC_TRS65132S_SLAVE 0x3e -#define PMIC_I2C_BUS I2C7 - -struct tps65132s_config { - uint32_t i2c_bus; - gpio_t en; -}; uint32_t panel_id(void); void configure_backlight(bool enable); -void tps65132s_power_on(struct tps65132s_cfg *config); /* Return the MIPI panel description */ struct panel_description *get_panel_description(void); diff --git a/src/mainboard/google/rauru/panel_sapphire.c b/src/mainboard/google/rauru/panel_sapphire.c index a832f7d6d1..829ef0c54f 100644 --- a/src/mainboard/google/rauru/panel_sapphire.c +++ b/src/mainboard/google/rauru/panel_sapphire.c @@ -1,19 +1,27 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include -#include +#include +#include +#include #include "gpio.h" #include "panel.h" static void mipi_panel_power_on(void) { - struct tps65132s_cfg config = { - .i2c_bus = PMIC_I2C_BUS, - .en = GPIO_EN_PP3300_EDP_X, - .sync = GPIO_EN_PPVAR_MIPI_DISP, - }; - tps65132s_power_on(&config); + mt6363_enable_vrf18(true); /* VDD */ + mdelay(3); /* tsVSP */ + gpio_output(GPIO_EN_PP3300_EDP_X, 1); /* AVDD */ + mdelay(2); /* tPON1 */ + gpio_output(GPIO_EN_PPVAR_MIPI_DISP, 1); /* AVEE */ + mdelay(2); + mdelay(10); /* tRW */ + gpio_output(GPIO_LCM_RST_1V8_L, 1); /* RESX */ + mdelay(5); + gpio_output(GPIO_LCM_RST_1V8_L, 0); + mdelay(5); + gpio_output(GPIO_LCM_RST_1V8_L, 1); } static struct panel_description sapphire_panels[] = { diff --git a/src/mainboard/google/rauru/panel_tps65132s.c b/src/mainboard/google/rauru/panel_tps65132s.c deleted file mode 100644 index 85677ea02d..0000000000 --- a/src/mainboard/google/rauru/panel_tps65132s.c +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include -#include -#include - -#include "gpio.h" -#include "panel.h" - -void tps65132s_power_on(struct tps65132s_cfg *config) -{ - const struct tps65132s_reg_setting reg_settings[] = { - { PMIC_TPS65132_VPOS, 0x14, 0x1F }, - { PMIC_TPS65132_VNEG, 0x14, 0x1F }, - { PMIC_TPS65132_DLYX, 0x95, 0xFF }, - { PMIC_TPS65132_ASSDD, 0x5B, 0xFF }, - }; - - mt6363_enable_vrf18(true); - config->settings = reg_settings; - config->setting_counts = ARRAY_SIZE(reg_settings); - - mtk_i2c_bus_init(config->i2c_bus, I2C_SPEED_FAST); - - if (tps65132s_setup(config) != CB_SUCCESS) - printk(BIOS_ERR, "Failed to set up tps65132s\n"); - - /* DISP_RST_1V8_L */ - mdelay(10); - gpio_output(GPIO_LCM_RST_1V8_L, 1); - mdelay(10); - gpio_output(GPIO_LCM_RST_1V8_L, 0); - mdelay(10); - gpio_output(GPIO_LCM_RST_1V8_L, 1); -} diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index 1a6159079e..dacbd855b0 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -90,7 +90,6 @@ ramstage-y += ../common/pmif_clk.c pmif_clk.c ramstage-y += ../common/pmif.c pmif_init.c ramstage-y += ../common/pmif_spmi_v2.c pmif_spmi.c ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c -ramstage-y += ../common/tps65132s.c ramstage-y += ../common/usb.c usb.c BL31_MAKEARGS += PLAT=mt8196