From 0b53a60d4d87d2b16066b8bb8de0c83580346316 Mon Sep 17 00:00:00 2001 From: Lu Tang Date: Wed, 12 Mar 2025 20:57:42 +0800 Subject: [PATCH] soc/mediatek/mt8196: Disable PMIF reset after enable Currently, we don't explicitly disable the PMIF and SPMI resets after the reset is completed, causing them to remain asserted for approximately 0.5ms. That would cause the DUT to hang during PMIF initialization (pmif_spmi_init) when using non-serial firmware. To fix this issue, explicitly disable the PMIF and SPMI resets immediately after the reset. BRANCH=rauru BUG=b:341054056 TEST=Build pass, non-serial firmware boot ok. Signed-off-by: Lu Tang Change-Id: Ic903ddd893470cd46dbfed9c3faa9c2a9e50c904 Reviewed-on: https://review.coreboot.org/c/coreboot/+/86859 Reviewed-by: Yidi Lin Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8196/pmif_clk.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/soc/mediatek/mt8196/pmif_clk.c b/src/soc/mediatek/mt8196/pmif_clk.c index 2c59dc5221..cf41219ee0 100644 --- a/src/soc/mediatek/mt8196/pmif_clk.c +++ b/src/soc/mediatek/mt8196/pmif_clk.c @@ -239,11 +239,12 @@ int pmif_clk_init(void) /* [12]: pmifspi_m_rst_b [13]: pmifspi_p_rst_b*/ SET32_BITFIELDS(&mtk_rug->wdt_vlp_swsysrst0, UNLOCK_KEY, 0x88, PMIFSPMI_RST_B, 0x3, PMIF_RST_B, 0x3); - SET32_BITFIELDS(&mtk_rug->wdt_vlp_swsysrst0, UNLOCK_KEY, 0x88); + SET32_BITFIELDS(&mtk_rug->wdt_vlp_swsysrst0, UNLOCK_KEY, 0x88, PMIFSPMI_RST_B, 0x0, + PMIF_RST_B, 0x0); /* [0]: tia_grst_b */ SET32_BITFIELDS(&mtk_rug->wdt_vlp_swsysrst1, UNLOCK_KEY, 0x88, TIA_GRST_B, 0x1); - SET32_BITFIELDS(&mtk_rug->wdt_vlp_swsysrst1, UNLOCK_KEY, 0x88); + SET32_BITFIELDS(&mtk_rug->wdt_vlp_swsysrst1, UNLOCK_KEY, 0x88, TIA_GRST_B, 0x0); printk(BIOS_INFO, "%s: done\n", __func__);