mb/trulo/var/pujjocento: Support x32 memory configuration

Use the GPP_E13 level to determine whether x32 memory configuration
is supported.

BUG=b:422001335
BRANCH=firmware-trulo-15217.771.B
TEST=emerge-nissa coreboot chromeos-bootimage

Change-Id: If1dcffaeb358093f06c4c349a83152a2bdcc16f6
Signed-off-by: lizheng <lizheng@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87925
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kun Liu <liukun11@huaqin.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>

src/mainboard/google/brya/Kconfig

@@ -518,6 +518,7 @@ config BOARD_GOOGLE_PUJJOCENTO
 	select BOARD_GOOGLE_BASEBOARD_TRULO
 	select DRIVERS_I2C_SX9324
 	select DRIVERS_I2C_SX9324_SUPPORT_LEGACY_LINUX_DRIVER
+	select ENFORCE_MEM_CHANNEL_DISABLE
 	select HAVE_WWAN_POWER_SEQUENCE
 	select MAINBOARD_HAS_GOOGLE_STRAUSS_KEYBOARD
 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB

src/mainboard/google/brya/variants/pujjocento/gpio.c

@@ -451,7 +451,7 @@ static const struct pad_config early_gpio_table[] = {
 	/* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
 	PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
 	/* E13 : THC0_SPI1_IO0 ==> SINGLE CHANNEL */
-	PAD_CFG_GPI(GPP_E13, NONE, DEEP),
+	PAD_CFG_GPI_LOCK(GPP_E13, NONE, LOCK_CONFIG),
 	/* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
 	PAD_CFG_GPO(GPP_H20, 0, DEEP),
 };

src/mainboard/google/brya/variants/pujjocento/memory.c

@@ -3,6 +3,7 @@
 #include <baseboard/variants.h>
 #include <gpio.h>
 #include <soc/romstage.h>
+#include <soc/meminit.h>
 
 static const struct mb_cfg variant_memcfg = {
 	.type = MEM_TYPE_LP5X,
@@ -109,3 +110,16 @@ void variant_get_spd_info(struct mem_spd *spd_info)
 	spd_info->topo = MEM_TOPO_MEMORY_DOWN;
 	spd_info->cbfs_index = variant_memory_sku();
 }
+
+uint8_t mb_get_channel_disable_mask(void)
+{
+	/*
+	 * GPP_E13 High -> One RAM Chip
+	 * GPP_E13 Low  -> Two RAM Chip
+	 */
+	if (gpio_get(GPP_E13)) {
+		/* Disable all other channels except first two on each controller */
+		return (BIT(2) | BIT(3));
+	}
+	return 0;
+}