diff --git a/Documentation/mainboard/topton/adl/x2f-n100.md b/Documentation/mainboard/topton/adl/x2f-n100.md
index c386ad35a1..941c8a7cb0 100644
--- a/Documentation/mainboard/topton/adl/x2f-n100.md
+++ b/Documentation/mainboard/topton/adl/x2f-n100.md
@@ -28,26 +28,26 @@ Doing so **may kill your device**. You have been warned :)
 ### Internally
 
 Vendor of this motherboard hasn't locked any flash regions, resulting
-in [flashprog] having full access to the SPI chip.
-Assuming that user had booted Linux with `iomem=relaxed`, they can:
+in internal programmers such as [flashrom]/[flashprog] having full access
+to the SPI chip. Assuming that user had booted Linux with `iomem=relaxed`,
+they can:
 - Flash coreboot from stock firmware
 - Flash stock firmware from coreboot
 - Update coreboot build to a newer version
 
 	Without opening the case and connecting the SPI flasher.
 
-Please note that for AlderLake-N platform you will need to use
-[flashprog] v1.3.0 or newer.
+Note: some users have reported bricked devices when using [flashrom] to
+flash the board, so the current recommendation is to use [flashprog]
+v1.3.0 or newer.
 
-[flashrom] is broken due to regressions, which results in
-failed flashes, bricking the device.
+Since we only need to flash the `bios` region of the flash chip, there is
+no need to extract the `ifd` or `me` regions from your backup of the stock
+firmware. One can flash the `bios` region only using the following command:
+`flashprog -p internal --ifd -i bios -w ./build/coreboot.rom -N`
 
-[flashprog] is a better maintained fork of [flashrom], which
-works flawlessly.
-
-You can skip extracting `SI_BIOS` and `SI_ME` regions from your ROM
-and flash coreboot to `SI_BIOS` region by issuing the following command:
-`flashprog -p internal --ifd -i SI_BIOS -w ./build/coreboot.rom`
+The `-N` tells [flashprog`] to skip verification on the other regions of the
+flash chip which are not being written.
 
 ### Externally
 
@@ -57,6 +57,10 @@ Please note that SPI voltage on this board is standard 3.3V, despite
 using mobile SoC.
 Vendor populated this board with Winbond W25Q128JV chip in SOIC-8 package.
 
+Flashing coreboot using an external programmer is exactly the same as
+using an internal programmer, other than the `programmer` argument:
+`flashprog -p <programmer> --ifd -i bios -w ./build/coreboot.rom -N`
+
 ## Functionality
 
 ### Tested and working