- 1.1.4

Major restructuring of hypertransport handling.
  Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically
  Updates to hard_reset handling when resetting because of the need to change hypertransport link
    speeds and widths.
    (a) No longer assume the boot is good just because we get to a hard reset point.
    (b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the
       boot counter.
  Updates to arima/hdama mptable so it tracks the new bus numbers


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/include/device/device.h

@@ -110,5 +110,6 @@ extern void root_dev_read_resources(device_t dev);
 extern void root_dev_set_resources(device_t dev);
 extern unsigned int walk_static_devices(device_t bus, unsigned int max);
 extern void enable_childrens_resources(device_t dev);
+extern unsigned int root_dev_scan_pci_bus(device_t root, unsigned int max);
 
 #endif /* DEVICE_H */

src/include/device/hypertransport.h

@@ -0,0 +1,9 @@
+#ifndef DEVICE_HYPERTRANSPORT_H
+#define DEVICE_HYPERTRANSPORT_H
+
+unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_unitid, unsigned int max);
+
+#define HT_IO_HOST_ALIGN 4096
+#define HT_MEM_HOST_ALIGN (1024*1024)
+
+#endif /* DEVICE_HYPERTRANSPORT_H */