diff --git a/src/mainboard/technoland/sbc710/Config b/src/mainboard/technoland/sbc710/Config index e8c54b2725..afe15a75df 100644 --- a/src/mainboard/technoland/sbc710/Config +++ b/src/mainboard/technoland/sbc710/Config @@ -4,7 +4,9 @@ ldscript cpu/i386/entry16.lds mainboardinit cpu/i386/reset16.inc ldscript cpu/i386/reset16.lds -# mainboardinit superio/NSC/pc87309/setup_serial.inc +option SERIAL_SUPERIO_BASEADDRESS=0x370 +mainboardinit superio/winbond/w83977ef/setup_serial.inc + mainboardinit pc80/serial.inc northbridge intel/440bx southbridge intel/piix4e @@ -25,6 +27,8 @@ option L440BX object mainboard.o object irq_tables.o +option UPDATE_MICROCODE + cpu p6 cpu p5 diff --git a/src/mainboard/technoland/sbc710/config.example b/src/mainboard/technoland/sbc710/config.example index 2978d8e87f..0990f7daca 100644 --- a/src/mainboard/technoland/sbc710/config.example +++ b/src/mainboard/technoland/sbc710/config.example @@ -8,10 +8,6 @@ mainboard technoland/sbc710 option SERIAL_CONSOLE option NO_KEYBOARD -# Enable MicroCode update and L2 Cache init for PII and PIII -option UPDATE_MICROCODE -#option CONFIGURE_L2_CACHE - option INBUF_COPY option DEFAULT_CONSOLE_LOGLEVEL=9 option DEBUG diff --git a/src/superio/winbond/w83977ef/setup_serial.inc b/src/superio/winbond/w83977ef/setup_serial.inc index 3b44ee160e..fff98c49d0 100644 --- a/src/superio/winbond/w83977ef/setup_serial.inc +++ b/src/superio/winbond/w83977ef/setup_serial.inc @@ -2,9 +2,13 @@ movw port, %dx; \ outb %al, %dx +#ifndef SERIAL_SUPERIO_BASEADDRESS +#define SERIAL_SUPERIO_BASEADDRES $0x3f0 +#endif + /* the second outit is a cheap delay */ -#define OUTPNPADDR(val) OUTIT(val, $0x3f0); OUTIT(val, $0xeb) -#define OUTPNPDATA(val) OUTIT(val, $0x3f1); OUTIT(val, $0xeb) +#define OUTPNPADDR(val) OUTIT(val, SERIAL_SUPERIO_BASEADDRESS); OUTIT(val, $0xeb) +#define OUTPNPDATA(val) OUTIT(val, SERIAL_SUPERIO_BASEADDRESS+1); OUTIT(val, $0xeb) /* to do: move this to a common include file! */ #define WRITESIOBYTE(register, value) movw register, %dx ;\