From 09d5220b779ef699b50c8069a262a74767a0c225 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 8 May 2017 21:08:23 +0200 Subject: [PATCH] UPSTREAM: superio/nuvoton: Make SuperIO config functions externally available BUG=none BRANCH=none TEST=none Change-Id: I0e7e4ecb909d6f99a1cd1bc965b52694a8291e03 Signed-off-by: Patrick Georgi Original-Commit-Id: d84a1cae093ffc6d4a3d1f4ec7599f2ba5da81f2 Original-Change-Id: I05f768c67542770e65279a562c05225b84edca40 Original-Signed-off-by: Arthur Heymans Original-Reviewed-on: https://review.coreboot.org/19626 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Nico Huber Original-Reviewed-by: Paul Menzel Original-Reviewed-by: Philippe Mathieu-Daud Reviewed-on: https://chromium-review.googlesource.com/506178 Commit-Ready: Patrick Georgi Tested-by: Patrick Georgi Reviewed-by: Patrick Georgi --- src/superio/nuvoton/common/early_serial.c | 8 ++++---- src/superio/nuvoton/common/nuvoton.h | 2 ++ 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c index d1958a0431..380046f841 100644 --- a/src/superio/nuvoton/common/early_serial.c +++ b/src/superio/nuvoton/common/early_serial.c @@ -45,7 +45,7 @@ /* Enable configuration: pass entry key '0x87' into index port dev * two times. */ -static void pnp_enter_conf_state(pnp_devfn_t dev) +void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(NUVOTON_ENTRY_KEY, port); @@ -53,7 +53,7 @@ static void pnp_enter_conf_state(pnp_devfn_t dev) } /* Disable configuration: pass exit key '0xAA' into index port dev. */ -static void pnp_exit_conf_state(pnp_devfn_t dev) +void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(NUVOTON_EXIT_KEY, port); @@ -62,7 +62,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev) /* Bring up early serial debugging output before the RAM is initialized. */ void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase) { - pnp_enter_conf_state(dev); + nuvoton_pnp_enter_conf_state(dev); if (IS_ENABLED(CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A)) /* Route GPIO8 pin group to COM A */ pnp_write_config(dev, 0x2a, 0x40); @@ -70,5 +70,5 @@ void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase) pnp_set_enable(dev, 0); pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); + nuvoton_pnp_exit_conf_state(dev); } diff --git a/src/superio/nuvoton/common/nuvoton.h b/src/superio/nuvoton/common/nuvoton.h index 22f112733a..614b039be5 100644 --- a/src/superio/nuvoton/common/nuvoton.h +++ b/src/superio/nuvoton/common/nuvoton.h @@ -21,6 +21,8 @@ #include #include +void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev); +void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev); void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase); #endif /* SUPERIO_NUVOTON_COMMON_ROMSTAGE_H */