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coreboot rush: Add support for rush board

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Add basic support for rush board

BUG=None
BRANCH=None
TEST=Compiles successfully with soc tegra132 and armv8 arch selected for
romstage and ramstage

Change-Id: Ica57c68d230e4e0e9916729752395843de188733
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/197399
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Furquan Shaikh 2014-04-28 16:44:21 -07:00 • committed by chrome-internal-fetch
commit 06a040dc32
7 changed files with 154 additions and 0 deletions
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4
configs/config.rush Normal file
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@ -0,0 +1,4 @@
CONFIG_VENDOR_GOOGLE=y
CONFIG_BOARD_GOOGLE_RUSH=y
CONFIG_COREBOOT_ROMSIZE_KB_4096=y
CONFIG_CONSOLE_SERIAL=y

3
src/mainboard/google/Kconfig
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@ -54,6 +54,8 @@ config BOARD_GOOGLE_PEPPY
bool "Peppy"
config BOARD_GOOGLE_RAMBI
bool "Rambi"
config BOARD_GOOGLE_RUSH
bool "Rush"
config BOARD_GOOGLE_SAMUS
bool "Samus"
config BOARD_GOOGLE_SLIPPY
@ -79,6 +81,7 @@ source "src/mainboard/google/parrot/Kconfig"
source "src/mainboard/google/peach_pit/Kconfig"
source "src/mainboard/google/peppy/Kconfig"
source "src/mainboard/google/rambi/Kconfig"
source "src/mainboard/google/rush/Kconfig"
source "src/mainboard/google/samus/Kconfig"
source "src/mainboard/google/slippy/Kconfig"
source "src/mainboard/google/storm/Kconfig"

38
src/mainboard/google/rush/Kconfig Normal file
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@ -0,0 +1,38 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
if BOARD_GOOGLE_RUSH
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select SOC_NVIDIA_TEGRA132
config MAINBOARD_DIR
string
default google/rush
config MAINBOARD_PART_NUMBER
string
default "Rush"
config DRAM_SIZE_MB
int
default 2048
endif # BOARD_GOOGLE_RUSH

22
src/mainboard/google/rush/Makefile.inc Normal file
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@ -0,0 +1,22 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
romstage-y += romstage.c
ramstage-y += mainboard.c

22
src/mainboard/google/rush/devicetree.cb Normal file
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@ -0,0 +1,22 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
chip soc/nvidia/tegra132
device cpu_cluster 0 on end
end

35
src/mainboard/google/rush/mainboard.c Normal file
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@ -0,0 +1,35 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/device.h>
#include <boot/coreboot_tables.h>
static void mainboard_init(device_t dev)
{
}
static void mainboard_enable(device_t dev)
{
dev->ops->init = &mainboard_init;
}
struct chip_operations mainboard_ops = {
.name = "rush",
.enable_dev = mainboard_enable,
};

30
src/mainboard/google/rush/romstage.c Normal file
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@ -0,0 +1,30 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/stages.h>
#include <cbfs.h>
#include <console/console.h>
void main(void)
{
void *entry;
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
stage_exit(entry);
}