From 069c17da77ed9f8a4bec88123cd198620d51fd03 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Mon, 11 Aug 2008 16:12:58 +0000 Subject: [PATCH] .c and .dts for mcp 55 Signed-off-by: Ronald G. Minnich Acked-by: Carl-Daniel Hailfinger git-svn-id: svn://coreboot.org/repository/coreboot-v3@742 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- southbridge/nvidia/mcp55/sata.c | 90 +++++++++++++++++++++++++++++++ southbridge/nvidia/mcp55/sata.dts | 26 +++++++++ 2 files changed, 116 insertions(+) create mode 100644 southbridge/nvidia/mcp55/sata.c create mode 100644 southbridge/nvidia/mcp55/sata.dts diff --git a/southbridge/nvidia/mcp55/sata.c b/southbridge/nvidia/mcp55/sata.c new file mode 100644 index 0000000000..f247b4583c --- /dev/null +++ b/southbridge/nvidia/mcp55/sata.c @@ -0,0 +1,90 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Tyan Computer + * Written by Yinghai Lu for Tyan Computer. + * Copyright (C) 2006,2007 AMD + * Written by Yinghai Lu for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mcp55.h" + + +static void sata_init(struct device *dev) +{ + u32 dword; + + struct southbridge_nvidia_mcp55_sata_config *conf = + (struct southbridge_nvidia_mcp55_sata_config *)dev->device_configuration; + + dword = pci_read_config32(dev, 0x50); + /* Ensure prefetch is disabled */ + dword &= ~((1 << 15) | (1 << 13)); + if(conf) { + if (conf->sata1_enable) { + dword |= (1<<0); + printk(BIOS_DEBUG, "Enable secondary SATA interface\t"); + } + if (conf->sata0_enable) { + dword |= (1<<1); + printk(BIOS_DEBUG, "Enable primary SATA interface\n"); + } + } else { + dword |= (1<<1) | (1<<0); + printk(BIOS_DEBUG, "Enable primary and secondary SATA interfaces\n"); + } + + +#if 1 + dword &= ~(0x1f<<24); + dword |= (0x15<<24); +#endif + pci_write_config32(dev, 0x50, dword); + + dword = pci_read_config32(dev, 0xf8); + dword |= 2; + pci_write_config32(dev, 0xf8, dword); + + +#warning finish set subsystem in mcp55 sata +#if 0 + pci_write_config32(dev, 0x40, + ((device & 0xffff) << 16) | (vendor & 0xffff)); +#endif +} + +struct device_operations mcp55_sata = { + .id = {.type = DEVICE_ID_PCI, + {.pci = {.vendor = PCI_VENDOR_ID_NVIDIA, + .device = PCI_DEVICE_ID_NVIDIA_MCP55_SATA1}}}, + .constructor = default_device_constructor, + .phase3_scan = 0, + .phase4_read_resources = pci_dev_read_resources, + .phase4_set_resources = pci_dev_set_resources, + .phase5_enable_resources = pci_dev_enable_resources, + .phase6_init = sata_init, + .ops_pci = &pci_dev_ops_pci, +}; diff --git a/southbridge/nvidia/mcp55/sata.dts b/southbridge/nvidia/mcp55/sata.dts new file mode 100644 index 0000000000..72bc3ba438 --- /dev/null +++ b/southbridge/nvidia/mcp55/sata.dts @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-8 Ronald G. Minnich * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +{ + device_operations = "mcp55_sata"; + + sata0_enable = "0"; + sata1_enable = "0"; + +};